On Wed, Jun 10, 2020 at 10:38:45PM +0200, Marek Vasut wrote: > On 6/10/20 10:16 PM, Tom Rini wrote: > [...] > > configs/socfpga_dbm_soc1_defconfig | 1 + > > configs/socfpga_de0_nano_soc_defconfig | 1 + > > configs/socfpga_de10_nano_defconfig | 1 + > > configs/socfpga_de1_soc_defconfig | 1 + > > I don't think those de*_soc boards have a SPI NOR at all. > And I'm also afraid that enabling this will make those boards overflow > SPL size limits.
There is zero size change from this patch on any platform included in this patch. Today each of the boards you mention enables CONFIG_SPL_SPI_SUPPORT, CONFIG_SPL_SPI_FLASH_SUPPORT and then CONFIG_SPL_SPI_FLASH_TINY. That said, that means you aren't using SPL_DM_SPI for real, so I'll go take a look at what to change instead in the previous patch, thanks! -- Tom
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