Dear Marek Vasut,

In message <1282296691-15910-7-git-send-email-marek.va...@gmail.com> you wrote:
> The following hardware is currently supported:
> - UART
> - USB Host
> - FPGA
...
> +int usb_board_init(void)
> +{
> +     UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
> +             ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
> +
> +     UHCHR |= UHCHR_FSBIR;
> +
> +     while (UHCHR & UHCHR_FSBIR);
> +
> +     UHCHR &= ~UHCHR_SSE;
> +     UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
> +
> +     /* Clear any OTG Pin Hold */
> +     if (PSSR & PSSR_OTGPH)
> +             PSSR |= PSSR_OTGPH;
> +
> +     UHCRHDA &= ~(0x200);
> +     UHCRHDA |= 0x100;
> +
> +     /* Set port power control mask bits, only 3 ports. */
> +     UHCRHDB |= (0x7<<17);
> +
> +     /* enable port 2 */
> +     UP2OCR |= UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;

Why aren't you using I/O accessors here?

> +void usb_board_stop(void)
> +{
> +     UHCHR |= UHCHR_FHR;
> +     udelay(11);
> +     UHCHR &= ~UHCHR_FHR;
> +
> +     UHCCOMS |= 1;
> +     udelay(10);
> +
> +     CKEN &= ~CKEN10_USBHOST;

And here, and so on?


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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