On Fri, Jul 10, 2020 at 4:39 PM Sagar Shrikant Kadam <sagar.ka...@sifive.com> wrote: > > The resets to DDR and ethernet sub-system are connected to > PRCI device reset control register, these reset signals > are active low and are held low at power-up. Add these reset > producer and consumer details needed by the reset driver. > > Signed-off-by: Sagar Shrikant Kadam <sagar.ka...@sifive.com> > --- > arch/riscv/dts/fu540-c000-u-boot.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) >
Reviewed-by: Bin Meng <bin.m...@windriver.com>
