On Tue, Sep 14, 2010 at 4:16 PM, Stefan Roese <s...@denx.de> wrote: > Hi Vipin, > > On Tuesday 14 September 2010 07:22:10 Vipin Kumar wrote: >> This is about a generic problem which may also be faced >> by other developers. Our SoC has a masked bootrom area >> which copies an image from NOR/NAND memories to an internal >> embedded SRAM. The size of this SRAM is only 8K. This >> binary initializes the DDR for larger binaries (u-boot/OS) >> to be placed in RAM and executed from there. >> >> I wanted to know if there is a generic way to create two >> binaries from the u-boot source both compiled for different >> address ranges. The first initializes the RAM (may be >> something else as well) and the second is the u-boot binary >> responsible for loading OS etc. > > Take a look at the NAND_SPL infrastructure (nand_spl/*). It was created for > platforms booting from NAND with tight restrictions (e.g. 4k image size for > inital setup, mostly DDR). General idea here is that 2 images are created: > > a) Very small SPL (secondary program loader) image with only basic > setup, like DDR and NAND > b) RAM based U-Boot image > > Both images are combined in the build process creating a single image that can > be flashed into NAND. > > doc/README.nand-boot-ppc440 might be interesting to get some more infos about > this, some of it PPC4xx specific though.
Same method. OneNAND IPL (2KiB, 8KiB or 16KiB) combined with u-boot.bin and generate u-boot-onenand.bin OneNAND IPL (at SRAM) load the u-boot.bin to DRAM and jump to u-boot address. Thank you, Kyungmin Park _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot