Add USB related DT entries to enable USB device mode.
Signed-off-by: Vignesh Raghavendra <vigne...@ti.com>
---
.../k3-j7200-common-proc-board-u-boot.dtsi | 14 +++++++++
arch/arm/dts/k3-j7200-common-proc-board.dts | 18 +++++++++++
arch/arm/dts/k3-j7200-main.dtsi | 30 +++++++++++++++++++
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 18 +++++++++++
4 files changed, 80 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index 10bb069492..4dca59cefa 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -102,3 +102,17 @@
&exp2 {
u-boot,dm-spl;
};
+
+&main_usbss0_pins_default {
+ u-boot,dm-spl;
+};
+
+&usbss0 {
+ u-boot,dm-spl;
+ ti,usb2-only;
+};
+
+&usb0 {
+ dr_mode = "peripheral";
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts
b/arch/arm/dts/k3-j7200-common-proc-board.dts
index 537ef2a79d..969881fb83 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
@@ -30,6 +30,12 @@
J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA
*/
>;
};
+
+ main_usbss0_pins_default: main_usbss0_pins_default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS
*/
+ >;
+ };
};
&wkup_uart0 {
@@ -121,3 +127,15 @@
#gpio-cells = <2>;
};
};
+
+&usbss0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ ti,vbus-divider;
+ ti,usb2-only;
+};
+
+&usb0 {
+ dr_mode = "otg";
+ maximum-speed = "high-speed";
+};
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index f3df5d8f10..aaa1fdd5a3 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -310,4 +310,34 @@
clocks = <&k3_clks 193 1>;
power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
};
+
+ usbss0: cdns_usb@4104000 {
+ compatible = "ti,j721e-usb";
+ reg = <0x00 0x4104000 0x00 0x100>;
+ dma-coherent;
+ power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 288 12>, <&k3_clks 288 3>;
+ clock-names = "usb2_refclk", "lpm_clk";
+ assigned-clocks = <&k3_clks 288 12>; /* USB2_REFCLK */
+ assigned-clock-parents = <&k3_clks 288 13>; /* HFOSC0 */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ usb0: usb@6000000 {
+ compatible = "cdns,usb3";
+ reg = <0x00 0x6000000 0x00 0x10000>,
+ <0x00 0x6010000 0x00 0x10000>,
+ <0x00 0x6020000 0x00 0x10000>;
+ reg-names = "otg", "xhci", "dev";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /*
irq.0 */
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /*
irq.6 */
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /*
otgirq.0 */
+ interrupt-names = "host",
+ "peripheral",
+ "otg";
+ maximum-speed = "super-speed";
+ dr_mode = "otg";
+ };
+ };
};
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index ffd0d09ece..f5e4166926 100644
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -129,6 +129,12 @@
J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA
*/
>;
};
+
+ main_usbss0_pins_default: main_usbss0_pins_default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS
*/
+ >;
+ };
};
&wkup_uart0 {
@@ -196,4 +202,16 @@
};
};
+&usbss0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ ti,vbus-divider;
+ ti,usb2-only;
+};
+
+&usb0 {
+ dr_mode = "otg";
+ maximum-speed = "high-speed";
+};
+
#include "k3-j7200-common-proc-board-u-boot.dtsi"
--
2.28.0
