>-----Original Message-----
>From: Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>
>Sent: Wednesday, September 9, 2020 2:06 PM
>To: u-boot@lists.denx.de; Priyanka Jain <priyanka.j...@nxp.com>
>Cc: Varun Sethi <v.se...@nxp.com>; Meenakshi Aggarwal
><meenakshi.aggar...@nxp.com>; Thirupathaiah Annapureddy
><thir...@linux.microsoft.com>
>Subject: [PATCH] armv8: lx2160a: fix reset sequence
>
>From: Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>
>
>Make sure that SW_RST_REQ and RST_REQ_MSK are cleared before triggering
>hardware reset request.
>
>Signed-off-by: Thirupathaiah Annapureddy <thir...@linux.microsoft.com>
>Signed-off-by: Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>
>---
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
>diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>index 8a2f404..e610528 100644
>--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>@@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
>- * Copyright 2017-2019 NXP
>+ * Copyright 2017-2020 NXP
> * Copyright 2014-2015 Freescale Semiconductor, Inc.
> */
>
>@@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32
>*)CONFIG_SYS_FSL_RST_ADDR;
>
> void __efi_runtime reset_cpu(ulong addr) {
>- u32 val;
>-
> #ifdef CONFIG_ARCH_LX2160A
>- val = in_le32(rstcr);
>- val |= 0x01;
>- out_le32(rstcr, val);
>+ /* clear the RST_REQ_MSK and SW_RST_REQ */
>+ out_le32(rstcr, 0x0);
>+
>+ /* initiate the sw reset request */
>+ out_le32(rstcr, 0x1);
> #else
>+ u32 val;
>+
> /* Raise RESET_REQ_B */
> val = scfg_in32(rstcr);
> val |= 0x02;
>--
>2.7.4
Reviewed-by: Priyanka Jain <priyanka.j...@nxp.com>
