Hi Simon,

chromebook_coral.dts contains multiple entries of fsps,pcie-root-port-en
and fsps,pcie-rp-hot-plug.

I don't think this is intentional, as the code parsing the FSP-S settings will
only use one of those settings.

regards, Wolfgang


------------------ 8< ---------------------------------
chromebook_coral.dts:

&fsp_s {
        u-boot,dm-pre-proper;

        fsps,ish-enable = <0>;
        fsps,enable-sata = <0>;
        fsps,pcie-root-port-en = [00 00 00 00 00 01];
        fsps,pcie-rp-hot-plug = [00 00 00 00 00 01];
        
        // ... 
        
    /* Enable WiFi */
        fsps,pcie-root-port-en = [01 00 00 00 00 00];
        fsps,pcie-rp-hot-plug = [00 00 00 00 00 00];
        
        // ...
};

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