> Clearing MIP.MSIP is not guaranteed to do anything by the spec. In > addition, most existing RISC-V hardware does nothing when this bit is set. > > The following commits "riscv: Use a valid bit to ignore already-pending > IPIs" and "riscv: Clear pending IPIs on initialization" should implement > the original intent of the reverted commit in a more robust manner. > > This reverts commit 9472630337e7c4ac442066b5a752aaa8c3b4d4a6. > > Signed-off-by: Sean Anderson <sean...@gmail.com> > Reviewed-by: Bin Meng <bin.m...@windriver.com> > ---
Reviewed-by: Rick Chen <r...@andestech.com>
