Hi, We have several use cases where customers want to partition memory by putting NS images above 4GB. On Xilinx arm 64bit SOC 0-2GB can be used for others CPU in the systems (like R5) or for secure sw. Currently there is limitation in SPL to record load/entry addresses in 64bit format because they are recorded in 32bit only. This series add support for it. Patches have been tested on Xilinx ZynqMP zcu102 board in SD bootmode with images generated by binman. Because u-boot is using CONFIG_POSITION_INDEPENDENT it can be put to others 4k aligned addresses and there is no real need to build it to certain offset.
Thanks, Michal Changes in v4: - In case of missing entry point initialize image_info->entry_point to FDT_ERROR. This has been seen on RISCV instances. FDT_ERROR handling should be changed separately because entry_point is uintptr_t and there is no way how to pass error conditions that's why FDT_ERROR is used instead. - RISCV32_SPL reports issue that two cells format (64bit value) is unsupported address size. But that's not accurate because two cell format is valid on any 32bit platform. What it is not supported is address above 4GB. That's why code is fixed by reading value to 64bit type first and then check if upper 32bits are zero or not. On all 32bit platforms upper bits should be 0 and if not, message is shown. Changes in v3: - Change example to have 64bit addresses for u-boot - Add reviewed-by from Simon Changes in v2: - Also fix opensbi - Add record to doc/uImage.FIT/howto.txt - reported by Simon Michal Simek (2): spl: Use standard FIT entries spl: fdt: Record load/entry fit-images entries in 64bit format common/fdt_support.c | 9 +---- common/image-fit.c | 11 +++--- common/spl/spl_atf.c | 7 ++-- common/spl/spl_fit.c | 8 +++- common/spl/spl_opensbi.c | 8 ++-- doc/uImage.FIT/howto.txt | 84 ++++++++++++++++++++++++++++++++++++++++ 6 files changed, 106 insertions(+), 21 deletions(-) -- 2.28.0