Previously io_sel=0xe incorrect stated PCIE1 was enabled. Also add
support for the mpc8640's PCIE2 interface.
Signed-off-by: Peter Tyser <pty...@xes-inc.com>
CC: Kumar Gala <ga...@kernel.crashing.org>
---
arch/powerpc/cpu/mpc8xxx/pci_cfg.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
index 186936f..53236a3 100644
--- a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
+++ b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
@@ -138,7 +138,10 @@ static struct pci_info pci_config_info[] =
{
[LAW_TRGT_IF_PCIE_1] = {
.cfg = (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) |
- (1 << 7) | (1 << 0xe) | (1 << 0xf),
+ (1 << 7) | (1 << 0xf),
+ },
+ [LAW_TRGT_IF_PCIE_2] = {
+ .cfg = (1 << 3) | (1 << 0xe) | (1 << 0xf),
},
};
#elif defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
--
1.7.0.4
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