po 26. 10. 2020 v 12:31 odesÃlatel Michal Simek <michal.si...@xilinx.com> napsal: > > Use tabs to be aligned with the rest of the code. > > Fixes: 658df8bd9464 ("mtd: spi-nor-core: Add octal mode support") > Signed-off-by: Michal Simek <michal.si...@xilinx.com> > --- > > drivers/mtd/spi/sf_internal.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h > index dabd40a4cc1e..9ceff0e7c128 100644 > --- a/drivers/mtd/spi/sf_internal.h > +++ b/drivers/mtd/spi/sf_internal.h > @@ -67,7 +67,7 @@ struct flash_info { > #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */ > #define USE_CLSR BIT(14) /* use CLSR command */ > #define SPI_NOR_HAS_SST26LOCK BIT(15) /* Flash supports lock/unlock via BPR > */ > -#define SPI_NOR_OCTAL_READ BIT(16) /* Flash supports Octal Read */ > +#define SPI_NOR_OCTAL_READ BIT(16) /* Flash supports Octal Read */ > }; > > extern const struct flash_info spi_nor_ids[]; > -- > 2.28.0 >
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs