At present CONFIG_CHROMEOS is used to determine whether verified boot is
in use. The code to implement that is not in U-Boot mainline.
However, it is useful to be able to boot a Chromebook in developer mode
in U-Boot mainline without needing the verified boot code.
To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
should be used, and CONFIG_CHROMEOS to indicate that the board supports
Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.
Signed-off-by: Simon Glass <s...@chromium.org>
Reviewed-by: Bin Meng <bmeng...@gmail.com>
---
(no changes since v2)
Changes in v2:
- Define CONFIG_CHROMEOS_VBOOT in the Kconfig too
- Correct a bisect build error
arch/x86/cpu/apollolake/acpi.c | 3 ++-
arch/x86/dts/chromebook_coral.dts | 2 +-
arch/x86/dts/chromebook_samus.dts | 2 +-
arch/x86/include/asm/intel_gnvs.h | 3 ---
arch/x86/lib/tpl.c | 2 +-
common/Kconfig.boot | 17 +++++++++++++++++
configs/chromebook_coral_defconfig | 1 +
7 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c
index 69b544f0d98..5af8a181b1e 100644
--- a/arch/x86/cpu/apollolake/acpi.c
+++ b/arch/x86/cpu/apollolake/acpi.c
@@ -75,7 +75,8 @@ int acpi_create_gnvs(struct acpi_global_nvs *gnvs)
/* TODO(s...@chromium.org): Add the console log to gnvs->cbmc */
-#ifdef CONFIG_CHROMEOS
+/* Disable this code until a later patch */
+#if 0
/* Initialise Verified Boot data */
chromeos_init_acpi(&gnvs->chromeos);
gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
diff --git a/arch/x86/dts/chromebook_coral.dts
b/arch/x86/dts/chromebook_coral.dts
index 92f70b13dd7..43f4b33da1b 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -9,7 +9,7 @@
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-#ifdef CONFIG_CHROMEOS
+#ifdef CONFIG_CHROMEOS_VBOOT
#include "chromeos-x86.dtsi"
#include "flashmap-x86-ro.dtsi"
#include "flashmap-16mb-rw.dtsi"
diff --git a/arch/x86/dts/chromebook_samus.dts
b/arch/x86/dts/chromebook_samus.dts
index 772ea5c91be..d8e04a66985 100644
--- a/arch/x86/dts/chromebook_samus.dts
+++ b/arch/x86/dts/chromebook_samus.dts
@@ -9,7 +9,7 @@
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-#ifdef CONFIG_CHROMEOS
+#ifdef CONFIG_CHROMEOS_VBOOT
#include "chromeos-x86.dtsi"
#include "flashmap-x86-ro.dtsi"
#include "flashmap-8mb-rw.dtsi"
diff --git a/arch/x86/include/asm/intel_gnvs.h
b/arch/x86/include/asm/intel_gnvs.h
index 632307427cd..7f9f101371c 100644
--- a/arch/x86/include/asm/intel_gnvs.h
+++ b/arch/x86/include/asm/intel_gnvs.h
@@ -85,9 +85,6 @@ struct __packed acpi_global_nvs {
u8 unused2[0x1000 - 0x100]; /* Pad out to 4096 bytes */
#endif
};
-
-#ifdef CONFIG_CHROMEOS
check_member(acpi_global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET);
-#endif
#endif /* _INTEL_GNVS_H_ */
diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index 6f7eb43a172..15b0212d190 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -75,7 +75,7 @@ void board_init_f_r(void)
u32 spl_boot_device(void)
{
- return IS_ENABLED(CONFIG_CHROMEOS) ? BOOT_DEVICE_CROS_VBOOT :
+ return IS_ENABLED(CONFIG_CHROMEOS_VBOOT) ? BOOT_DEVICE_CROS_VBOOT :
BOOT_DEVICE_SPI_MMAP;
}
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index 522f5f3d6a4..3f6d9c1a258 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -343,6 +343,23 @@ config ARCH_FIXUP_FDT_MEMORY
used for booting OS with different memory setup where the part of
the memory location should be used for different purpose.
+config CHROMEOS
+ bool "Support booting Chrome OS"
+ help
+ Chrome OS requires U-Boot to set up a table indicating the boot mode
+ (e.g. Developer mode) and a few other things. Enable this if you are
+ booting on a Chromebook to avoid getting an error about an invalid
+ firmware ID.
+
+config CHROMEOS_VBOOT
+ bool "Support Chrome OS verified boot"
+ help
+ This is intended to enable the full Chrome OS verified boot support
+ in U-Boot. It is not actually implemented in the U-Boot source code
+ at present, so this option is always set to 'n'. It allows
+ distinguishing between booting Chrome OS in a basic way (developer
+ mode) and a full boot.
+
endmenu # Boot images
menu "Boot timing"
diff --git a/configs/chromebook_coral_defconfig
b/configs/chromebook_coral_defconfig
index d934eeb8866..e1907a0b7bc 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -21,6 +21,7 @@ CONFIG_INTEL_CAR_CQOS=y
CONFIG_X86_OFFSET_U_BOOT=0xffd00000
CONFIG_X86_OFFSET_SPL=0xffe80000
CONFIG_INTEL_GENERIC_WIFI=y
+CONFIG_CHROMEOS=y
CONFIG_BOOTSTAGE=y
CONFIG_SPL_BOOTSTAGE=y
CONFIG_TPL_BOOTSTAGE=y
--
2.29.1.341.ge80a0c044ae-goog
