On Mon, 2020-11-09 at 09:51 +0100, Stefan Roese wrote:
> On 09.11.20 09:25, Weijie Gao wrote:
> > This patch adds reset controller bits definition header file for MediaTek
> > MT7620 SoC
> > 
> > Signed-off-by: Weijie Gao <weijie....@mediatek.com>
> 
> Just curious: Where are you including this file? I couldn't find it
> in a quick search through the following patches. Perhaps its also
> a good idea to add some MTMIPS_ or MT7620_ before the defines, to
> not "pollute" the namespace with too generic macros.

This header files is only included in arch/mips/dts/mt7620.dtsi, and
used in the resets properties, e.g. resets = <&rstctrl PIO_RST>;

> 
> Other than that:
> 
> Reviewed-by: Stefan Roese <s...@denx.de>
> 
> Thanks,
> Stefan
> 
> > ---
> > v3 changes: none
> > v2 changes: none
> > ---
> >   include/dt-bindings/reset/mt7620-reset.h | 35 ++++++++++++++++++++++++
> >   1 file changed, 35 insertions(+)
> >   create mode 100644 include/dt-bindings/reset/mt7620-reset.h
> > 
> > diff --git a/include/dt-bindings/reset/mt7620-reset.h 
> > b/include/dt-bindings/reset/mt7620-reset.h
> > new file mode 100644
> > index 0000000000..3096b29cdb
> > --- /dev/null
> > +++ b/include/dt-bindings/reset/mt7620-reset.h
> > @@ -0,0 +1,35 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2020 MediaTek Inc.
> > + *
> > + * Author:  Weijie Gao <weijie....@mediatek.com>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_MT7620_RESET_H_
> > +#define _DT_BINDINGS_MT7620_RESET_H_
> > +
> > +#define PPE_RST                    31
> > +#define SDHC_RST           30
> > +#define MIPS_CNT_RST               28
> > +#define PCIE_RST           26
> > +#define UHST_RST           25
> > +#define EPHY_RST           24
> > +#define ESW_RST                    23
> > +#define UDEV_RST           22
> > +#define FE_RST                     21
> > +#define WLAN_RST           20
> > +#define UARTL_RST          19
> > +#define SPI_RST                    18
> > +#define I2S_RST                    17
> > +#define I2C_RST                    16
> > +#define NAND_RST           15
> > +#define DMA_RST                    14
> > +#define PIO_RST                    13
> > +#define UARTF_RST          12
> > +#define PCM_RST                    11
> > +#define MC_RST                     10
> > +#define INTC_RST           9
> > +#define TIMER_RST          8
> > +#define SYS_RST                    0
> > +
> > +#endif /* _DT_BINDINGS_MT7620_RESET_H_ */
> > 
> 
> 
> Viele Grüße,
> Stefan
> 

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