Diamond Mesa support both HPS handoff data and DDR handoff data.
HPS handoff data support re-use Straix10 and Agilex code. DDR
handoff data is newly introduced in Diamond Mesa.
Signed-off-by: Siew Chin Lim <elly.siew.chin....@intel.com>
---
arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 19 ++++++++++
arch/arm/mach-socfpga/wrap_handoff_soc64.c | 40 ++++++++++++++++++++++
2 files changed, 59 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
index 68e0278384..c38b232065 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
@@ -23,8 +23,27 @@
#define SOC64_HANDOFF_OFFSET_DATA 0x10
#define SOC64_HANDOFF_SIZE 4096
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
#define SOC64_HANDOFF_BASE 0xFFE3F000
#define SOC64_HANDOFF_MISC (SOC64_HANDOFF_BASE + 0x610)
+#elif defined(CONFIG_TARGET_SOCFPGA_DM)
+#define SOC64_HANDOFF_BASE 0xFFE5F000
+#define SOC64_HANDOFF_MISC (SOC64_HANDOFF_BASE + 0x630)
+
+/* DDR handoff */
+#define SOC64_HANDOFF_DDR_BASE 0xFFE5C000
+
+#define SOC64_HANDOFF_DDR_MAGIC 0x48524444
+#define SOC64_HANDOFF_DDR_UMCTL2_MAGIC 0x4C54434D
+#define SOC64_HANDOFF_DDR_MEMRESET_BASE (SOC64_HANDOFF_DDR_BASE
+ 0xC)
+#define SOC64_HANDOFF_DDR_UMCTL2_SECTION (SOC64_HANDOFF_DDR_BASE + 0x10)
+#define SOC64_HANDOFF_DDR_UMCTL2_BASE (SOC64_HANDOFF_DDR_BASE + 0x1C)
+#define SOC64_HANDOFF_DDR_PHY_MAGIC 0x43594850
+#define SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC 0x45594850
+#define SOC64_HANDOFF_DDR_PHY_BASE_OFFSET 0x8
+#endif
+
#define SOC64_HANDOFF_MUX (SOC64_HANDOFF_BASE + 0x10)
#define SOC64_HANDOFF_IOCTL (SOC64_HANDOFF_BASE + 0x1A0)
#define SOC64_HANDOFF_FPGA (SOC64_HANDOFF_BASE + 0x330)
diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
index 672bdd5230..aea384897e 100644
--- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
+++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
@@ -67,6 +67,46 @@ int socfpga_handoff_read(void *handoff_address, void *table,
u32 table_len,
debug("at addr 0x%p\n", (u32 *)handoff_address);
return -EPERM;
}
+ } else {
+#ifdef CONFIG_TARGET_SOCFPGA_DM
+ temp = readl(handoff_address);
+ if (temp == SOC64_HANDOFF_DDR_UMCTL2_MAGIC) {
+ debug("%s: umctl2 handoff data =\n{\n",
+ __func__);
+ } else if (temp == SOC64_HANDOFF_DDR_PHY_MAGIC) {
+ debug("%s: PHY handoff data =\n{\n",
+ __func__);
+ } else if (temp == SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC) {
+ debug("%s: PHY engine handoff data =\n{\n",
+ __func__);
+ }
+
+ debug("handoff table address = 0x%p table length = 0x%x\n",
+ table_x32, table_len);
+
+ if (temp == SOC64_HANDOFF_DDR_UMCTL2_MAGIC ||
+ temp == SOC64_HANDOFF_DDR_PHY_MAGIC ||
+ temp == SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC) {
+ /* Using handoff from Quartus tools if exists */
+ for (i = 0; i < table_len; i++) {
+ *table_x32 = readl(handoff_address +
+ SOC64_HANDOFF_OFFSET_DATA + (i
* 4));
+
+ if (!(i % 2))
+ debug(" No.%d Addr 0x%08x: ", i,
+ *table_x32);
+ else
+ debug(" 0x%08x\n", *table_x32);
+
+ table_x32++;
+ }
+ debug("\n}\n");
+ } else {
+ debug("%s: Cannot find HANDOFF MAGIC ", __func__);
+ debug("at addr 0x%p\n", (u32 *)handoff_address);
+ return -EPERM;
+ }
+#endif
}
return 0;
--
2.13.0
