On 2020/11/8 下午10:00, Hugh Cole-Baker wrote:
Commit c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob")
added an alias spi1 referring to spi@ff1d0000, however there was already
an alias spi0 referring to the same node in rockpro64's u-boot.dtsi, and
having both aliases present broke booting from SPI flash for this board.

Remove the spi0 alias, set the default bus for SPI flash to 1, and
enable support for numbered aliases in SPL so that it uses the same bus
numbering as U-Boot proper. This fixes booting from U-Boot in SPI flash
on the rockpro64 board.

Signed-off-by: Hugh Cole-Baker <sigma...@gmail.com>
Suggested-by: Simon Glass <s...@chromium.org>
Fixes: c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.y...@rock-chips.com>

Thanks,
- Kever
---
  arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ----
  configs/rockpro64-rk3399_defconfig        | 2 ++
  2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi 
b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
index cb8991aa253..6317b47e41a 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
@@ -6,10 +6,6 @@
  #include "rk3399-u-boot.dtsi"
  #include "rk3399-sdram-lpddr4-100.dtsi"
  / {
-       aliases {
-               spi0 = &spi1;
-       };
-
        chosen {
                u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdmmc, 
&sdhci;
        };
diff --git a/configs/rockpro64-rk3399_defconfig 
b/configs/rockpro64-rk3399_defconfig
index bfba8704072..575b7a20d50 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPL_OF_CONTROL=y
  CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent 
assigned-clocks assigned-clock-rates assigned-clock-parents"
  CONFIG_ENV_IS_IN_SPI_FLASH=y
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
  CONFIG_ROCKCHIP_GPIO=y
  CONFIG_SYS_I2C_ROCKCHIP=y
  CONFIG_DM_KEYBOARD=y
@@ -41,6 +42,7 @@ CONFIG_MMC_DW=y
  CONFIG_MMC_DW_ROCKCHIP=y
  CONFIG_MMC_SDHCI=y
  CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
  CONFIG_SPI_FLASH_GIGADEVICE=y
  CONFIG_DM_ETH=y
  CONFIG_ETH_DESIGNWARE=y


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