From: Chee Hong Ang <chee.hong....@intel.com>

SPL already setup the Clock Manager with the handoff data
from OCRAM. When the Clock Manager's driver get probed again
in SSBL, it shall skip the handoff data access in OCRAM.

Signed-off-by: Chee Hong Ang <chee.hong....@intel.com>
---
 arch/arm/mach-socfpga/wrap_pll_config_s10.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c 
b/arch/arm/mach-socfpga/wrap_pll_config_s10.c
index 3da85791a1..049c5711a8 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config_s10.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config_s10.c
@@ -12,6 +12,7 @@
 
 const struct cm_config * const cm_get_default_config(void)
 {
+#ifdef CONFIG_SPL_BUILD
        struct cm_config *cm_handoff_cfg = (struct cm_config *)
                (S10_HANDOFF_CLOCK + S10_HANDOFF_OFFSET_DATA);
        u32 *conversion = (u32 *)cm_handoff_cfg;
@@ -26,7 +27,7 @@ const struct cm_config * const cm_get_default_config(void)
        } else if (handoff_clk == S10_HANDOFF_MAGIC_CLOCK) {
                return cm_handoff_cfg;
        }
-
+#endif
        return NULL;
 }
 
-- 
2.13.0

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