Serie proposed after analysis in [1], to correctly handle Domain Access Control Register (DACR) and activate the domain checking in MMU against the permission bits in the translation tables and avoids prefetching issue on ARMv7, as indicated in [1].
I propose a clean and general solution for ARMv7, when the LPAE is not activated; after this update, I revert the correction done for OMAP by the commit de63ac278cba ("ARM: mmu: Set domain permissions to client access") Tests on ARMv7 platform is requested before integration, so I think the target can be v2021.07 (next). The 2 first patch of the serie solve issues for stm32mp platform when dcache is activate in pre-reloc or in SPL. See also correction for LPAE mode in commit 06d43c808d61 ("arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode") [1] [PATCH 0/7] arm: cache: cp15: don't map reserved region with no-map property http://u-boot.10912.n7.nabble.com/PATCH-0-7-arm-cache-cp15-don-t-map-reserved-region-with-no-map-property-tt428715.html Patrick Delaunay (8): stm32mp: update MMU config before the relocation stm32mp: update the mmu configuration for SPL and prereloc arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGH arm: cosmetic: align TTB_SECT define value arm: cp15: update DACR value to activate access control arm: omap2: remove arm_init_domains arm: cp15: remove weak function arm_init_domains arm: remove set_dacr/get_dacr functions arch/arm/cpu/armv7/cache_v7.c | 3 --- arch/arm/include/asm/cache.h | 1 - arch/arm/include/asm/system.h | 18 ++------------ arch/arm/lib/cache-cp15.c | 13 ++++------ arch/arm/mach-omap2/omap-cache.c | 17 ------------- arch/arm/mach-stm32mp/cpu.c | 40 +++++++++++++++++++++++-------- arch/arm/mach-stm32mp/dram_init.c | 13 ++++++---- 7 files changed, 46 insertions(+), 59 deletions(-) -- 2.17.1