On 1/30/2021 3:17 AM, Pratyush Yadav wrote: > On 28/01/21 01:36PM, tkuw584...@gmail.com wrote: >> From: Takahiro Kuwano <takahiro.kuw...@infineon.com> >> >> Some of Spansion/Cypress chips support Read/Write Any Register commands. >> These commands are mainly used to write volatile registers and access to >> the registers in second and subsequent die for multi-die package parts. >> >> The Read Any Register instruction (65h) is followed by register address >> and dummy cycles, then the selected register byte is returned. >> >> The Write Any Register instruction (71h) is followed by register address >> and register byte to write. >> >> Signed-off-by: Takahiro Kuwano <takahiro.kuw...@infineon.com> >> --- >> drivers/mtd/spi/spi-nor-core.c | 25 +++++++++++++++++++++++++ >> include/linux/mtd/spi-nor.h | 4 ++++ >> 2 files changed, 29 insertions(+) >> >> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c >> index 34c15f1561..2803536ed5 100644 >> --- a/drivers/mtd/spi/spi-nor-core.c >> +++ b/drivers/mtd/spi/spi-nor-core.c >> @@ -211,6 +211,31 @@ static int spi_nor_write_reg(struct spi_nor *nor, u8 >> opcode, u8 *buf, int len) >> return spi_nor_read_write_reg(nor, &op, buf); >> } >> >> +#ifdef CONFIG_SPI_FLASH_SPANSION >> +static int spansion_read_any_reg(struct spi_nor *nor, u32 addr, u8 dummy, >> + u8 *val) >> +{ >> + struct spi_mem_op op = >> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDAR, 1), >> + SPI_MEM_OP_ADDR(nor->addr_width, addr, 1), >> + SPI_MEM_OP_DUMMY(dummy / 8, 1), >> + SPI_MEM_OP_DATA_IN(1, NULL, 1)); >> + >> + return spi_nor_read_write_reg(nor, &op, val); >> +} >> + >> +static int spansion_write_any_reg(struct spi_nor *nor, u32 addr, u8 val) >> +{ >> + struct spi_mem_op op = >> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRAR, 1), >> + SPI_MEM_OP_ADDR(nor->addr_width, addr, 1), >> + SPI_MEM_OP_NO_DUMMY, >> + SPI_MEM_OP_DATA_OUT(1, NULL, 1)); >> + >> + return spi_nor_read_write_reg(nor, &op, &val); >> +} >> +#endif >> + >> static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t >> len, >> u_char *buf) >> { >> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h >> index 89e7a4fdcd..e31073eb24 100644 >> --- a/include/linux/mtd/spi-nor.h >> +++ b/include/linux/mtd/spi-nor.h >> @@ -121,6 +121,10 @@ >> #define SPINOR_OP_BRWR 0x17 /* Bank register write */ >> #define SPINOR_OP_BRRD 0x16 /* Bank register read */ >> #define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ >> +#define SPINOR_OP_RDAR 0x65 /* Read any register */ >> +#define SPINOR_OP_WRAR 0x71 /* Write any register */ >> +#define SPINOR_REG_ADDR_STR1V 0x00800000 >> +#define SPINOR_REG_ADDR_CFR1V 0x00800002 > > These two defines are not used by this patch. Remove them from this one > and add them to the one that actually uses them for the first time. > I will fix it, thank you. > With this fixed, > > Reviewed-by: Pratyush Yadav <p.ya...@ti.com> > >> >> /* Used for Micron flashes only. */ >> #define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */ >> -- >> 2.25.1 >> > Best Regards, Takahiro