On 09/02/21 1:38 pm, Vignesh Raghavendra wrote:
> Since commit 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts
> into U-Boot") ranges have been added to CPSW node which results in
> U-Boot CPSW driver failing to acquire phy_gmii_sel register range and
> thus failing to configure GMII mode correctly.
>
> Fix this by deleting ranges in -u-boot-dtsi just like its done for other
> K3 platforms.
>
> Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
> Signed-off-by: Vignesh Raghavendra <vigne...@ti.com>
> ---
> arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 1 +
> 1 file changed, 1 insertion(+)
Applied to u-boot-ti/for-rc branch.
Thanks and regards,
Lokesh
>
> diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> index e52f7e1e86..bd037be350 100644
> --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> @@ -114,6 +114,7 @@
> reg = <0x0 0x46000000 0x0 0x200000>,
> <0x0 0x40f00200 0x0 0x8>;
> reg-names = "cpsw_nuss", "mac_efuse";
> + /delete-property/ ranges;
>
> cpsw-phy-sel@40f04040 {
> compatible = "ti,am654-cpsw-phy-sel";
>
