The startup code in arm/cpu/arm926ejs preserves the link register across
the call to lowlevel_init by using r4:
mov r4, lr /* perserve link reg across call */
bl lowlevel_init /* go setup pll,mux,memory */
mov lr, r4 /* restore link */
The lowlevel_init function for at91 machines based on the same CPU uses r4
and hence corrupts it causing a data abort when it returns to the startup
code. This patch fixes this by using r6 instead of r4 in the lowlevel_init
function.
Discovered and the fix was tested on a AT91SAM9261 based board.
Signed-off-by: Martin Townsend <mar...@rufilla.com>
---
arch/arm/mach-at91/arm926ejs/lowlevel_init.S | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
index 71d7582ce0..994f42eb4a 100644
--- a/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
+++ b/arch/arm/mach-at91/arm926ejs/lowlevel_init.S
@@ -71,10 +71,10 @@ POS1:
str r0, [r1]
/* Reading the PMC Status to detect when the Main Oscillator is enabled
*/
- mov r4, #AT91_PMC_IXR_MOSCS
+ mov r6, #AT91_PMC_IXR_MOSCS
MOSCS_Loop:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_MOSCS
bne MOSCS_Loop
@@ -89,10 +89,10 @@ MOSCS_Loop:
str r0, [r1]
/* Reading the PMC Status register to detect when the PLLA is locked */
- mov r4, #AT91_PMC_IXR_LOCKA
+ mov r6, #AT91_PMC_IXR_LOCKA
MOSCS_Loop1:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_LOCKA
bne MOSCS_Loop1
@@ -109,10 +109,10 @@ MOSCS_Loop1:
str r0, [r1]
/* Reading the PMC Status to detect when the Master clock is ready */
- mov r4, #AT91_PMC_IXR_MCKRDY
+ mov r6, #AT91_PMC_IXR_MCKRDY
MCKRDY_Loop:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_MCKRDY
bne MCKRDY_Loop
@@ -120,10 +120,10 @@ MCKRDY_Loop:
str r0, [r1]
/* Reading the PMC Status to detect when the Master clock is ready */
- mov r4, #AT91_PMC_IXR_MCKRDY
+ mov r6, #AT91_PMC_IXR_MCKRDY
MCKRDY_Loop1:
ldr r3, [r2]
- and r3, r4, r3
+ and r3, r6, r3
cmp r3, #AT91_PMC_IXR_MCKRDY
bne MCKRDY_Loop1
PLL_setup_end:
--
2.25.1
