Dear York Sun, In message <1286988197.5737.6.ca...@oslab-l1> you wrote: > > > Would it not be helpful to inform the user that we disabled a memory > > bank? Eventually this wa snot intentional... > > I can add a message but maybe not necessary. The only case the CS left > disable is the incomplete interleaving. For example the controller > interleaving is enabled, but the bank interleaving is disabled or less > than all populated CS are interleaving. In these cases, the unused CSs > (or maybe CS'es, my bad English) are not accessible, even enabled. This > patch doesn't change the hardware behavior, but to disable those unused > CS to avoid confusion.
I understand this. But I think the conditions that cause such behaviour are pretty unusual, and most probably not something that is actually intended by the end user - for example, he might have installed an incompatible DIMM or such. It would be nice if he was made aware that somthing unusual is going on, so he can double-check his configuration. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de 2000 pounds of chinese soup = 1 Won Ton _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot