On 3/6/21 12:59 AM, Bin Meng wrote:
On Fri, Mar 5, 2021 at 1:02 AM Heinrich Schuchardt <xypron.g...@gmx.de> wrote:
Add the System Reset Extension and the Hart State Management Extension
definitions.
Add missing RFENCE Extension enum values.
The SBI 0.1 extension constants are needed for for the sbi command. Remove
an #ifdef.
Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
Signed-off-by: Heinrich Schuchardt <xypron.g...@gmx.de>
---
arch/riscv/include/asm/sbi.h | 36 ++++++++++++++++++++++++++++++++++--
1 file changed, 34 insertions(+), 2 deletions(-)
U-Boot does not need HSM.
(yet)
As far as I can tell, it's completely conforming for all harts but one
to be put into the STOPPED state by the SBI (with the expectation that
U-Boot or something else start them). Also, while we currently figure
out which harts to start via device tree passed from SBI, that behavior
is not standardized. Going forward, I we may see some SBI
implementations which communicate this sort of info through HSM. Though
this has not happened yet...
--Sean
