Hi Alexandru, On Wed, 10 Mar 2021 at 11:04, Alexandru Gagniuc <mr.nuke...@gmail.com> wrote: > > The FPGA loading code in spl_simple_fit_read() can easily be separated > from the rest of the logic. It is split into two functions instead of > one because spl_fit_upload_fpga() is used in a subsequent patch. > > Signed-off-by: Alexandru Gagniuc <mr.nuke...@gmail.com> > --- > common/spl/spl_fit.c | 69 ++++++++++++++++++++++++++++---------------- > 1 file changed, 44 insertions(+), 25 deletions(-) >
Reviewed-by: Simon Glass <s...@chromium.org> > diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c > index 43fc43cf2b..55fca9f399 100644 > --- a/common/spl/spl_fit.c > +++ b/common/spl/spl_fit.c > @@ -526,6 +526,48 @@ __weak bool spl_load_simple_fit_skip_processing(void) > return false; > } > > +static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node, > + struct spl_image_info *fpga_image) > +{ > + int ret; > + > + debug("FPGA bitstream at: %x, size: %x\n", > + (u32)fpga_image->load_addr, fpga_image->size); > + > + ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size, > + BIT_FULL); > + if (ret) { > + printf("%s: Cannot load the image to the FPGA\n", __func__); > + return ret; > + } > + > + puts("FPGA image loaded from FIT\n"); Please add a blank line before last return in a function > + return 0; > +} > + > +static int spl_fit_load_fpga(struct spl_fit_info *ctx, > + struct spl_load_info *info, ulong sector) > +{ > + int node, ret; > + > + struct spl_image_info fpga_image = { > + .load_addr = 0, > + }; > + > + node = spl_fit_get_image_node(ctx, "fpga", 0); > + if (node < 0) > + return node; > + > + /* Load the image and set up the fpga_image structure */ > + ret = spl_load_fit_image(info, sector, ctx, node, &fpga_image); > + if (ret) { > + printf("%s: Cannot load the FPGA: %i\n", __func__, ret); > + return ret; > + } > + > + return spl_fit_upload_fpga(ctx, node, &fpga_image); > +} > + > static int spl_simple_fit_read(struct spl_fit_info *ctx, > struct spl_load_info *info, ulong sector, > const void *fit_header) > @@ -609,31 +651,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, > if (ret < 0) > return ret; > > -#ifdef CONFIG_SPL_FPGA > - node = spl_fit_get_image_node(&ctx, "fpga", 0); > - if (node >= 0) { > - /* Load the image and set up the spl_image structure */ > - ret = spl_load_fit_image(info, sector, &ctx, node, spl_image); > - if (ret) { > - printf("%s: Cannot load the FPGA: %i\n", __func__, > ret); > - return ret; > - } > - > - debug("FPGA bitstream at: %x, size: %x\n", > - (u32)spl_image->load_addr, spl_image->size); > - > - ret = fpga_load(0, (const void *)spl_image->load_addr, > - spl_image->size, BIT_FULL); > - if (ret) { > - printf("%s: Cannot load the image to the FPGA\n", > - __func__); > - return ret; > - } > - > - puts("FPGA image loaded from FIT\n"); > - node = -1; > - } > -#endif > + if (IS_ENABLED(CONFIG_SPL_FPGA)) > + spl_fit_load_fpga(&ctx, info, sector); > > /* > * Find the U-Boot image using the following search order: > -- > 2.26.2 > Regards, Simon