From: David Abdurachmanov <david.abdurachma...@sifive.com> Add fu740 support to macb ethernet driver
There is a PLL HW quirk in FU740. The VSC8541XMV-02 specification requires 125 +/-0.0125 Mhz. But the most close value can be output by PLL is 125.125 MHz and out of VSC8541XMV-02 spec. Signed-off-by: David Abdurachmanov <david.abdurachma...@sifive.com> Signed-off-by: Green Wan <green....@sifive.com> Reviewed-by: Ramon Fried <rfried....@gmail.com> --- drivers/net/macb.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 57ea45e2dc..bf70525c54 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -591,8 +591,17 @@ static int macb_sifive_clk_init(struct udevice *dev, ulong rate) * 0 = GMII mode. Use 125 MHz gemgxlclk from PRCI in TX logic * and output clock on GMII output signal GTX_CLK * 1 = MII mode. Use MII input signal TX_CLK in TX logic + * + * FU740 have a PLL HW quirk. The 125.125 Mhz is actually out of + * VSC8541XMV-02 specification. The tolerance level is +/-100ppm. + * Which means the range should be in between 125MHz +/-0.0125. + * But the most close value can be output by PLL is 125.125 MHz. */ - writel(rate != 125000000, gemgxl_regs); + if (device_is_compatible(dev, "sifive,fu540-c000-gem")) + writel(rate != 125000000, gemgxl_regs); + else if (device_is_compatible(dev, "sifive,fu740-c000-gem")) + writel(rate != 125125000, gemgxl_regs); + return 0; } @@ -1507,6 +1516,8 @@ static const struct udevice_id macb_eth_ids[] = { { .compatible = "cdns,zynq-gem" }, { .compatible = "sifive,fu540-c000-gem", .data = (ulong)&sifive_config }, + { .compatible = "sifive,fu740-c000-gem", + .data = (ulong)&sifive_config }, { .compatible = "microchip,mpfs-mss-gem", .data = (ulong)µchip_config }, { } -- 2.31.0