RE: [v1 02/17] arm: socfpga: Add base address for Intel N5X device

[Tan, Ley Foon]

> -----Original Message-----
> From: Lim, Elly Siew Chin <elly.siew.chin....@intel.com>
> Sent: Wednesday, March 31, 2021 10:39 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut <ma...@denx.de>; Tan, Ley Foon
> <ley.foon....@intel.com>; See, Chin Liang <chin.liang....@intel.com>;
> Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong
> <tien.fong.c...@intel.com>; Westergreen, Dalon
> <dalon.westergr...@intel.com>; Simon Glass <s...@chromium.org>; Gan,
> Yau Wai <yau.wai....@intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin....@intel.com>
> Subject: [v1 02/17] arm: socfpga: Add base address for Intel N5X device
> 
> Reuse base_addr_soc64.h for Intel N5X device, the address is the same as
> Agilex.
> 
> Signed-off-by: Siew Chin Lim <elly.siew.chin....@intel.com>
> ---
>  arch/arm/mach-socfpga/include/mach/base_addr_soc64.h | 3 ++-

Reviewed-by: Ley Foon Tan <ley.foon....@intel.com>