> -----Original Message----- > From: Lim, Elly Siew Chin <elly.siew.chin....@intel.com> > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut <ma...@denx.de>; Tan, Ley Foon > <ley.foon....@intel.com>; See, Chin Liang <chin.liang....@intel.com>; > Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong > <tien.fong.c...@intel.com>; Westergreen, Dalon > <dalon.westergr...@intel.com>; Simon Glass <s...@chromium.org>; Gan, > Yau Wai <yau.wai....@intel.com>; Lim, Elly Siew Chin > <elly.siew.chin....@intel.com> > Subject: [v1 09/17] arm: socfpga: Changed misc_s10.c to misc_soc64.c > > Rename to common file name to used by all SOC64 devices. > No functionality change. > > Signed-off-by: Siew Chin Lim <elly.siew.chin....@intel.com> > --- Reviewed-by: Ley Foon Tan <ley.foon....@intel.com>
- RE: [v1 03/17] arm: socfpga: Add handoff data sup... Chee, Tien Fong
- [v1 05/17] arm: socfpga: Get clock manager base address fo... Siew Chin Lim
- RE: [v1 05/17] arm: socfpga: Get clock manager base a... Tan, Ley Foon
- [v1 04/17] drivers: clk: Add clock driver for Intel N5X de... Siew Chin Lim
- RE: [v1 04/17] drivers: clk: Add clock driver for Int... Tan, Ley Foon
- [v1 06/17] drivers: clk: Add memory clock driver for Intel... Siew Chin Lim
- RE: [v1 06/17] drivers: clk: Add memory clock driver ... Tan, Ley Foon
- [v1 07/17] arm: socfpga: Move cm_get_mpu_clk_hz function d... Siew Chin Lim
- RE: [v1 07/17] arm: socfpga: Move cm_get_mpu_clk_hz f... Tan, Ley Foon
- [v1 09/17] arm: socfpga: Changed misc_s10.c to misc_soc64.... Siew Chin Lim
- RE: [v1 09/17] arm: socfpga: Changed misc_s10.c to mi... Tan, Ley Foon
- [v1 08/17] arm: socfpga: Add clock manager for Intel N5X d... Siew Chin Lim
- RE: [v1 08/17] arm: socfpga: Add clock manager for In... Tan, Ley Foon
- [v1 10/17] arm: socfpga: Add SDRAM driver helper function ... Siew Chin Lim
- RE: [v1 10/17] arm: socfpga: Add SDRAM driver helper ... Tan, Ley Foon
- RE: [v1 10/17] arm: socfpga: Add SDRAM driver hel... Chee, Tien Fong
- [v1 11/17] ddr: socfpga: Enable memory test on memory size... Siew Chin Lim
- RE: [v1 11/17] ddr: socfpga: Enable memory test on me... Tan, Ley Foon
- RE: [v1 11/17] ddr: socfpga: Enable memory test o... Chee, Tien Fong
- [v1 13/17] arm: socfpga: Add SPL for Intel N5X device Siew Chin Lim
- RE: [v1 13/17] arm: socfpga: Add SPL for Intel N5X de... Tan, Ley Foon