Wolfgang (and others who can/want),
Please test this patch; it should add a complete barrier to make
sure that all fixups are written to RAM before jumping there, and
that no remnants subsist of the old unfixed code in the instruction
paths. However, I cannot even do basic testing on it as I have
no 1136 board, so I cannot rule out even basic mistakes.
When this works I'll do a proper [PATCH].
Amicalement,
Albert.
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 8b63192..f49f1de 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -257,6 +257,11 @@ fixloop:
add r2, r2, #4
cmp r2, r3
bne fixloop
+ /* fixups done, cleanup caches if used and prefetch buffer */
+ mov r3, #0
+ mcr p15, 0, r3, c7, c10, 4 /* data synchronization barrier */
+ mcr p15, 0, r3, c7, c5, 0 /* invalidate instruction cache */
+ mcr p15, 0, r3, c7, c5, 4 /* flush prefetch buffer */
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
--
1.7.1
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