Dear Matthias Weisser,
> struct wdog_regs {
> - u32 wcr; /* Control */
> - u32 wsr; /* Service */
> - u32 wrsr; /* Reset Status */
> - u32 wicr; /* Interrupt Control */
> - u32 wmcr; /* Misc Control */
> + u16 wcr; /* Control */
> + u16 wsr; /* Service */
> + u16 wrsr; /* Reset Status */
> + u16 wicr; /* Interrupt Control */
> + u16 wmcr; /* Misc Control */
> };
What catches my ARM-aware eye:
I do not know the hardware, but are those registers really
arranged on 2 byte boundaries (00, 02, 04, 06, 08, 0a, .. offsets)?
Probably yes, assuming your code is tested ;)
Or should there be a u16 filler between each register?
Best Regards,
Reinhard
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