From: "Ying-Chun Liu (PaulLiu)" <paul...@debian.org>

When purchasing imx8mm-cl-iot-gate it is able to customize the
memory size. It could be 1GB, 2GB and 4GB. We implement
board_phys_sdram_size() to detect the memory size for usage.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul...@debian.org>
Cc: Fabio Estevam <feste...@denx.de>
Cc: Frieder Schrempf <frieder.schre...@kontron.de>
Cc: uboot-imx <uboot-...@nxp.com>
---
 .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c   | 25 +++++++++++++++++++
 include/configs/imx8mm-cl-iot-gate.h          |  2 +-
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c 
b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
index eabcc842a4..01c6011b75 100644
--- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
+++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
@@ -14,8 +14,33 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 
+#include "ddr/ddr.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
+int board_phys_sdram_size(phys_size_t *size)
+{
+       struct lpddr4_tcm_desc *lpddr4_tcm_desc =
+               (struct lpddr4_tcm_desc *)TCM_DATA_CFG;
+
+       switch (lpddr4_tcm_desc->size) {
+       case 4096:
+       case 2048:
+       case 1024:
+               *size = (1L << 20) * lpddr4_tcm_desc->size;
+               break;
+       default:
+               printf("%s: DRAM size %uM is not supported\n",
+                      __func__,
+                      lpddr4_tcm_desc->size);
+               while (1)
+                       ;
+               break;
+       };
+
+       return 0;
+}
+
 static int setup_fec(void)
 {
        if (IS_ENABLED(CONFIG_FEC_MXC)) {
diff --git a/include/configs/imx8mm-cl-iot-gate.h 
b/include/configs/imx8mm-cl-iot-gate.h
index faeee2178c..1e835563d6 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -158,7 +158,7 @@
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define PHYS_SDRAM                     0x40000000
-#define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
+#define PHYS_SDRAM_SIZE                        0x40000000 /* 1GB DDR */
 
 #define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
 
-- 
2.32.0

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