On Tue, Aug 31, 2021 at 8:34 PM Fabio Estevam <feste...@gmail.com> wrote: > > Hi Oleksandr, > > On Tue, Aug 31, 2021 at 1:42 PM Oleksandr Suvorov > <oleksandr.suvo...@foundries.io> wrote: > > > > Import HS400 support for iMX7ULP B0 from the Linux kernel: > > > > 2eaf5a533afd ("mmc: sdhci-esdhc-imx: Add HS400 support for iMX7ULP") > > > > According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET > > before any setting of STROBE_DLL_CTRL register. > > > > USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL) > > for slave sel value. If this register bits value is 0, it needs > > 256 ref_clk cycles to update slave sel value. IC suggest to set > > bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave > > sel value. This will short the lock time of slave. > > > > i.MX7ULP B0 will need more time to lock the REF and SLV, so change > > to add 5us delay. > > > > Signed-off-by: Oleksandr Suvorov <oleksandr.suvo...@foundries.io> > > Series-notes > > fsl_esdhc_imx improvements > > > > Import individual settings for soc imx7ulp and add support of HS400 for > > this soc. > > END > > The text below the Signed-off-by should be removed.
Oops, missed ":" :) The fix is coming. > > Other than that, the patch looks good: > > Reviewed-by: Fabio Estevam <feste...@gmail.com> Thanks, Fabio! -- Best regards Oleksandr Oleksandr Suvorov cryo...@gmail.com