> From: Zong Li <zong...@sifive.com> > Sent: Wednesday, September 01, 2021 3:02 PM > To: Rick Jian-Zhi Chen(陳建志) <r...@andestech.com>; Leo Yu-Chi Liang(梁育齊) > <ycli...@andestech.com>; bmeng...@gmail.com; sean...@gmail.com; > green....@sifive.com; paul.walms...@sifive.com; s...@chromium.org; > u-boot@lists.denx.de > Cc: Zong Li <zong...@sifive.com> > Subject: [PATCH v5 3/5] riscv: lib: implement enable_caches for sifive cache > > The enable_caches is a generic hook for architecture-implemented, we define > this function to enable composable cache of sifive platforms. > > In sifive_cache, it invokes the generic cache_enable interface of cache > uclass to execute the relative implementation in SiFive ccache driver. > > Signed-off-by: Zong Li <zong...@sifive.com> > --- > arch/riscv/Kconfig | 5 +++++ > arch/riscv/lib/Makefile | 1 + > arch/riscv/lib/sifive_cache.c | 27 +++++++++++++++++++++++++++ > 3 files changed, 33 insertions(+)
Reviewed-by: Rick Chen <r...@andestech.com>