On Tue, Sep 7, 2021 at 12:34 AM <nicholas_zh...@outlook.com> wrote: > > From: weichangzheng <nicholas_zh...@outlook.com> > > This adds platform code and the device tree for the Phytium Pomelo Board. > The initial support comprises the UART and the PCIE. > > Signed-off-by: weichangzheng <nicholas_zh...@outlook.com> > Changes since v1: > updated to DT > Changes since v2: > Modify some explicit types and macro > Changes since v3: > Modify some SDRAM related macro definitions and distro_bootcmd > Changes since v4: > Modify distro_bootcmd > Changes since v5: > Modify the CPU node description of the DT
This version is worse... > --- > arch/arm/Kconfig | 20 ++++ > arch/arm/dts/Makefile | 1 + > arch/arm/dts/phytium-pomelo.dts | 105 ++++++++++++++++++++ > board/phytium/pomelo/Kconfig | 12 +++ > board/phytium/pomelo/MAINTAINERS | 8 ++ > board/phytium/pomelo/Makefile | 14 +++ > board/phytium/pomelo/cpu.h | 73 ++++++++++++++ > board/phytium/pomelo/ddr.c | 161 +++++++++++++++++++++++++++++++ > board/phytium/pomelo/pcie.c | 60 ++++++++++++ > board/phytium/pomelo/pll.c | 73 ++++++++++++++ > board/phytium/pomelo/pomelo.c | 118 ++++++++++++++++++++++ > board/phytium/pomelo/sec.c | 37 +++++++ > configs/pomelo_defconfig | 18 ++++ > include/configs/pomelo.h | 44 +++++++++ > 14 files changed, 744 insertions(+) > create mode 100644 arch/arm/dts/phytium-pomelo.dts > create mode 100644 board/phytium/pomelo/Kconfig > create mode 100644 board/phytium/pomelo/MAINTAINERS > create mode 100644 board/phytium/pomelo/Makefile > create mode 100644 board/phytium/pomelo/cpu.h > create mode 100644 board/phytium/pomelo/ddr.c > create mode 100644 board/phytium/pomelo/pcie.c > create mode 100644 board/phytium/pomelo/pll.c > create mode 100644 board/phytium/pomelo/pomelo.c > create mode 100644 board/phytium/pomelo/sec.c > create mode 100644 configs/pomelo_defconfig > create mode 100644 include/configs/pomelo.h > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 0448787b8b..029af85fcb 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1818,6 +1818,25 @@ config TARGET_DURIAN > Support for durian platform. > It has 2GB Sdram, uart and pcie. > > +config TARGET_POMELO > + bool "Support Phytium Pomelo Platform" > + select ARM64 > + select DM > + select AHCI > + select SCSI_AHCI > + select AHCI_PCI > + select BLK > + select PCI > + select DM_PCI > + select SCSI > + select DM_SCSI > + select DM_SERIAL > + select DM_ETH if NET > + imply CMD_PCI > + help > + Support for pomelo platform. > + It has 8GB Sdram, uart and pcie. > + > config TARGET_PRESIDIO_ASIC > bool "Support Cortina Presidio ASIC Platform" > select ARM64 > @@ -2038,6 +2057,7 @@ source "board/toradex/colibri_pxa270/Kconfig" > source "board/variscite/dart_6ul/Kconfig" > source "board/vscom/baltos/Kconfig" > source "board/phytium/durian/Kconfig" > +source "board/phytium/pomelo/Kconfig" > source "board/xen/xenguest_arm64/Kconfig" > source "board/keymile/Kconfig" > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 9fb38682e6..45d0340bd3 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -1107,6 +1107,7 @@ dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb > dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb > > dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb > +dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb > > dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb > > diff --git a/arch/arm/dts/phytium-pomelo.dts b/arch/arm/dts/phytium-pomelo.dts > new file mode 100644 > index 0000000000..b6ed8ea360 > --- /dev/null > +++ b/arch/arm/dts/phytium-pomelo.dts > @@ -0,0 +1,105 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * dts file for Phytium Pomelo board > + * Copyright (C) 2021, Phytium Ltd. > + * lixinde <lixi...@phytium.com.cn> > + * weichangzheng <weichangzh...@phytium.com.cn> > + */ > +/dts-v1/; > + > +/ { > + model = "Phytium Pomelo"; > + compatible = "phytium,pomelo", "arm,armv8"; No. Again, the form is '<board compatible> <soc compatible>'. > + #address-cells = <2>; > + #size-cells = <2>; > + > + aliases { > + serial0 = &uart0; > + }; > + > + cpus { > + #address-cells = <0x2>; > + #size-cells = <0x0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; Is "phytium,pomelo" a CPU core implementation? Again, "arm,armv8" is only used for CPU cores on software models (e.g Arm Fastmodels Fixed Virtual Platform). > + reg = <0>; > + enable-method = "psci"; > + }; > + > + cpu@1 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; > + reg = <1>; > + enable-method = "psci"; > + }; > + > + cpu@2 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; > + reg = <2>; > + enable-method = "psci"; > + }; > + > + cpu@3 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; > + reg = <3>; > + enable-method = "psci"; > + }; > + > + cpu@4 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; > + reg = <4>; > + enable-method = "psci"; > + }; > + > + cpu@5 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; > + reg = <5>; > + enable-method = "psci"; > + }; > + > + cpu@6 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; > + reg = <6>; > + enable-method = "psci"; > + }; > + > + cpu@7 { > + device_type = "cpu"; > + compatible = "phytium,pomelo", "arm,armv8"; > + reg = <7>; > + enable-method = "psci"; > + }; > + }; > + > + pcie@40000000 { > + compatible = "pci-host-ecam-generic"; > + device_type = "pci"; > + #address-cells = <3>; > + #size-cells = <2>; > + reg = <0x0 0x40000000 0x0 0x10000000>; > + bus-range = <0x0 0xff>; > + ranges = <0x01000000 0x00 0x00000000 0x0 0x50000000 0x0 > 0x00F00000>, > + <0x02000000 0x00 0x58000000 0x0 0x58000000 0x0 > 0x28000000>, > + <0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 > 0x00000000>; > + }; > + > + sysclk_48mhz: clk48mhz { > + compatible = "fixed-clock"; > + #clock-cells = <0x0>; > + clock-frequency = <48000000>; > + clock-output-names = "sysclk_48mhz"; Wrong indentation. > + }; > + > + uart0: serial@28001000 { Put memory mapped peripherals under a 'simple-bus' node. > + compatible = "arm,pl011"; > + reg = <0x0 0x28001000 0x0 0x1000>; > + clocks = <&sysclk_48mhz>; > + }; > +};