From: Renato Frias <renato.fr...@freescale.com>

Adds video support to mx51evk board, this board allows different displays.
This patch enables the WVGA TFT LCD panel only, on Display interface 1.
Remove comments from include/configs/mx51evk.h to use it.

Signed-off-by: Renato Frias <renato.fr...@freescale.com>
---
Changes for v2:
        - Removed trailing whitespaces from struct fb_videomode
        - Using PAD_CTL_* definitions
        - Updated commit message

 board/freescale/mx51evk/mx51evk.c |   60 ++++++++++++++++++++++++++++++++++++-
 include/configs/mx51evk.h         |   11 +++++++
 2 files changed, 70 insertions(+), 1 deletions(-)

diff --git a/board/freescale/mx51evk/mx51evk.c 
b/board/freescale/mx51evk/mx51evk.c
index 2160d5a..3743121 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -34,9 +34,37 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#ifdef CONFIG_LCD
+#include <linux/fb.h>
+#include <lcd.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static u32 system_rev;
+extern int mx51_fb_init(struct fb_videomode *mode, u32 ipu_di, u32 pix_fmt);
+
+#ifdef CONFIG_LCD
+static struct fb_videomode claa_wvga = {
+       "CLAA07LC0ACW",
+       57,     /* Refresh */
+       800,    /* xres */
+       480,    /* yres */
+       37037,  /* pixclock = 27Mhz */
+       40,     /* left margin */
+       60,     /* right margin */
+       10,     /* upper margin */
+       10,     /* lower margin */
+       20,     /* hsync-len */
+       10,     /* vsync-len */
+       0,      /* sync */
+       FB_VMODE_NONINTERLACED, /* vmode */
+       0,      /* flag */
+};
+
+static int wvga_ipu_di = 1;
+static int wvga_bppix = 16;
+#endif
 
 #ifdef CONFIG_FSL_ESDHC
 struct fsl_esdhc_cfg esdhc_cfg[2] = {
@@ -148,6 +176,34 @@ static void setup_iomux_fec(void)
        mxc_iomux_set_pad(MX51_PIN_NANDF_D11, 0x2180);
 }
 
+#ifdef CONFIG_LCD
+void setup_iomux_ipu(void)
+{
+       /* DISP2_DAT [0:15] are configured by default */
+       mxc_request_iomux(MX51_PIN_DI1_D1_CS, IOMUX_CONFIG_ALT4);
+       mxc_iomux_set_pad(MX51_PIN_DI1_D1_CS,
+               PAD_CTL_PKE_ENABLE | PAD_CTL_DRV_HIGH | PAD_CTL_SRE_FAST);
+       mxc_request_iomux(MUX_IN_GPIO3_IPP_IND_G_IN_4_SELECT_INPUT,
+               INPUT_CTL_PATH1);
+
+       /* DISP2_DRDY pin */
+       mxc_request_iomux(MX51_PIN_DI_GP4, IOMUX_CONFIG_ALT4);
+       mxc_iomux_set_pad(MX51_PIN_DI_GP4, PAD_CTL_PKE_ENABLE |
+               PAD_CTL_PUE_KEEPER | PAD_CTL_DRV_LOW);
+}
+
+void lcd_enable(void)
+{
+       int ret;
+
+       ret = mx51_fb_init(&claa_wvga, wvga_ipu_di, wvga_bppix);
+       if (ret) {
+               puts("LCD cannot be configured\n");
+       }
+
+}
+#endif
+
 #ifdef CONFIG_MXC_SPI
 static void setup_iomux_spi(void)
 {
@@ -409,7 +465,9 @@ int board_init(void)
 
        setup_iomux_uart();
        setup_iomux_fec();
-
+#ifdef CONFIG_LCD
+       setup_iomux_ipu();
+#endif
        return 0;
 }
 
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index f98438d..cd931ea 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -211,6 +211,17 @@
 #define CONFIG_SYS_DDR_CLKSEL  0
 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
 
+/*
+ * Framebuffer and LCD
+ */
+/*
+#define CONFIG_LCD
+#define CONFIG_VIDEO_MX5
+#define LCD_BPP                LCD_COLOR16
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+*/
+
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
-- 
1.6.0.4

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to