On Tue, 2 Nov 2010 10:17:23 +0100
Stefan Roese <s...@denx.de> wrote:

> Hi Heiko,
> 
> On Tuesday 02 November 2010 09:55:46 Heiko Schocher wrote:
> > >> - preloader copies first page of nand (nand_spl code) to
> > >> 
> > >>   0xbb000000 (some cpu internal mem) and jumps to this address
> > >> 
> > >> - nand_spl does lowlevelinit, relocate itself to TEXT_BASE (nand_spl
> > >> code)
> > > 
> > > Why is this relocation needed? I understand that this 0xbb000000
> > 
> > Thats the question to solve ... don;t know, why nand_spl code
> > on arm (and other architectures?) do this ... I try to have a look
> > to find out, if we can run the nand_spl code complete from
> > this address, and immedietaly copy u-boot from nand to ram ...
> 
> On PPC4xx we need to copy the code from the original location (4KiB loaded 
> via 
> the ROM IPL boot loader) to SDRAM and continue running it from there. This is 
> necessary since we can't run from the original location (0xfffffxxx) and use 
> the PPC4xx NAND controller at the same time.

We have the same restriction on FSL NAND controllers -- certainly the
eLBC, and I think also the NFC which is used on ARM, though I'm less
familiar with that one.

> So there is no relocation to TEXT_BASE on 4xx but "only" a copy to 
> CONFIG_SYS_NAND_BOOT_SPL_DST.

It looks like you do memory init from assembly code to pull that off.
On 83xx/85xx we do an actual relocation of the NAND SPL.  Not sure
about ARM.

-Scott

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