[PATCH u-boot-marvell 05/10] pci: pci_mvebu, pci_aardvark: Fix size of configuration cache

[Marek Behún]

From: Marek Behún <marek.be...@nic.cz>

Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.be...@nic.cz>
---
 drivers/pci/pci-aardvark.c | 2 +-
 drivers/pci/pci_mvebu.c    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index 4e94b776c5..8abbc3ffe8 100644
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -202,7 +202,7 @@ struct pcie_advk {
        int                     sec_busno;
        struct udevice          *dev;
        struct gpio_desc        reset_gpio;
-       u32                     cfgcache[0x34 - 0x10];
+       u32                     cfgcache[(0x34 - 0x10) / 4];
        bool                    cfgcrssve;
 };
 
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index fde52ec99d..b545e62689 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -93,7 +93,7 @@ struct mvebu_pcie {
        unsigned int mem_attr;
        unsigned int io_target;
        unsigned int io_attr;
-       u32 cfgcache[0x34 - 0x10];
+       u32 cfgcache[(0x34 - 0x10) / 4];
 };
 
 /*
-- 
2.32.0