Scott Wood <scottw...@freescale.com> wrote on 2010/11/17 20:27:01: > > On Wed, 17 Nov 2010 20:15:01 +0100 > Joakim Tjernlund <joakim.tjernl...@transmode.se> wrote: > > > Scott Wood <scottw...@freescale.com> wrote on 2010/11/17 20:03:25: > > > The "load, conditional branch, isync" sequence is documented in the > > > architecture manual (1.7.1), "even if the effects of the 'dependency' > > > are independent of the value loaded". > > > > So it doesn't matter what address you do twi on? > > Still, it would make a little more sense if > > it read twi 0,r3,0 > > It's not an address, it's data that is being compared with zero. And it > has to be r4, since that's what you want to create the data dependency > on.
aha, should have looked closer on twi. > > The architecture suggests a similar but slightly longer sequence (but > I don't think the wording rules out using twi), which may make the > intent clearer: > > lwz r4, ... > cmpw r4, r4 > beq 1f > 1: isync I hope so because this is a lot of fuzz for something so simple, especially as the space is already GUARDED and no cache. Jocke _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
