On Tue, Dec 14, 2021 at 05:55:39PM +0000, Andre Przywara wrote: > The Juno Arm development board is an open, vendor-neutral, Armv8-A > development platform. > Add documentation that briefly outlines the hardware, and describes > building and installation of U-Boot. > > Signed-off-by: Andre Przywara <andre.przyw...@arm.com> > --- > doc/board/armltd/index.rst | 1 + > doc/board/armltd/juno.rst | 117 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 118 insertions(+) > create mode 100644 doc/board/armltd/juno.rst > > diff --git a/doc/board/armltd/index.rst b/doc/board/armltd/index.rst > index caa6fd2bb0..68d938c647 100644 > --- a/doc/board/armltd/index.rst > +++ b/doc/board/armltd/index.rst > @@ -8,3 +8,4 @@ ARM Ltd. boards and emulated systems > :maxdepth: 2 > > fvp64 > + juno > diff --git a/doc/board/armltd/juno.rst b/doc/board/armltd/juno.rst > new file mode 100644 > index 0000000000..f37bc2c78e > --- /dev/null > +++ b/doc/board/armltd/juno.rst > @@ -0,0 +1,117 @@ > +.. SPDX-License-Identifier: GPL-2.0 > +.. Copyright (C) 2021 Arm Ltd. > + > +Arm Juno board > +============== > + > +The `Juno development board`_ is an open, vendor-neutral, Armv8-A > +development platform, made by Arm Ltd. It is based on the former Versatile > +Express series. > +There are three revisions of the board: > + > +* Juno r0, with two Cortex-A57 and four Cortex-A53 cores, without PCIe. > +* Juno r1, with two Cortex-A57 and four Cortex-A53 cores, in later silicon > + revisions, and with PCIe slots, Gigabit Ethernet and two SATA ports. > +* Juno r2, with two Cortex-A72 and four Cortex-A53 cores, otherwise the > + same as r1. > + > +Among other things, the motherboard contains a management controller (MCP),
IIRC the MCP is new and inside the SoC. You may refer [1], [2] and use the terminologies from there to be consistent with the documentation. IIRC this one is referred as MCC. So I would prefer s/MCP/MCC or MB throughout this document. > +an FPGA providing I/O interfaces (IOFPGA) and 64MB of NOR flash. The provided > +platform devices resemble the VExpress peripherals. > +The actual SoC also contains a Cortex-M3 based System Control Processor > (SCP). > + > +U-Boot build > +------------ > +There is only one defconfig and one binary build that covers all three board > +revisions, so to generate the needed ``u-boot.bin``: > + > +.. code-block:: bash > + > + $ make vexpress_aemv8a_juno_defconfig > + $ make > + > +The automatic distro boot sequence looks for UEFI boot applications and > +``boot.scr`` scripts on various boot media, starting with USB, then on disks > +connected to the two SATA ports, PXE, DHCP and eventually on the NOR flash. > + > +U-Boot installation > +------------------- > +This assumes there is some firmware on the SD card or NOR flash (see below > +for more details). The U-Boot binary is included in the Trusted Firmware > +FIP image, so after building U-Boot, this needs to be repackaged or > recompiled. > + > +The NOR flash will be updated by the MCP, based on the content of a micro-SD > +card, which will be exported as a USB mass storage device via the rear USB-B > +socket. So to access that SD card, connect a USB-A->USB-B cable between some > +host computer and the board, and mount the FAT partition on the UMS device. > +If there is no device, check the upper serial port for a prompt, and > +explicitly enable the USB interface:: > + > + Cmd> usb_on > + Enabling debug USB... > + Not sure if you need these details(above one paragraph) here if we can direct to one of the pages I have pointed out or specifically [3]. I guess you can add other topics from there and links to those subsections if you need more details. I am fine either way. Otherwise looks good. Thanks for doing this. -- Regards, Sudeep [1] https://developer.arm.com/documentation/100113/0000 [2] https://developer.arm.com/documentation/dui0928/e/firmware/firmware-components [3] https://developer.arm.com/documentation/dui0928/e/configuration/connecting-to-a-host-computer?lang=en
