><snip> > >> >My understanding is that the SGMII link is always at 1000Mbps speed - >> >see figure 1 from the app note. Additionally look at figure 3. My >> >understand from it, and the app note's text is that SGMII >> >auto-negotiation doesn't really occur - its just passing the PHY-side >> >auto-negotiation results to the Freescale MAC, which software then >> >configures. I'm not sure what the purpose of the "SGMII >> >auto-negotiation" is - its not really auto- negotiating and the same >> >information can be read from the PHY via its MDIO interface, which is >what is happening on X-ES boards currently. >> >> I guess the point is to save MDIO signals to the external PHY and read >> the negotiated result from the internal TBI PHY. > >Do the P2020DS, MPC8572DS and P1/P2 RDB boards not have an MDIO interface >to their PHYs'? I've never heard of a board that doesn't, and would guess >the tsec driver in U-Boot requires a PHY to be accessible via MDIO to use >the corresponding network interface.
I'm not sure which specific silicon omits the MDIO signal. But quoting from the app note you mentioned: " Depending on the PowerQUICC part used, some eTSEC’s may or may not provide an external MDIO management interface. However, the TBI block for each eTSEC is associated in a one to one manner, even if that eTSEC does not have an external MDIO connection." The auto-negotiation mechanism between TBI PHY and real PHY does make it possible to save external MDIO signals if only SGMII interface is used. > >I can forward you the email thread about SGMII auto-negotiation with >Freescale's FAE off-list if you'd like as well. Yes, please. Thanks - Leo _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot