Resync the SOM and baseboard files with the device trees that will
be included in 5.17-RC1 when it's cut.  This will improve pinmuxing
for USDHC1 and add USB functionality.  Add edits to
imx8mn-beacon-kit-u-boot for enabling USB.

Signed-off-by: Adam Ford <aford...@gmail.com>

diff --git a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi 
b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi
index 376ca8ff72..0f40b43ac0 100644
--- a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi
@@ -126,7 +126,6 @@
                compatible = "wlf,wm8962";
                reg = <0x1a>;
                clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
-               clock-names = "xclk";
                DCVDD-supply = <&reg_audio>;
                DBVDD-supply = <&reg_audio>;
                AVDD-supply = <&reg_audio>;
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi 
b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index 69fd69c8d0..a06b271787 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -110,6 +110,10 @@
        u-boot,dm-spl;
 };
 
+&usbotg1 {
+       dr_mode="host";
+};
+
 &usdhc1 {
        u-boot,dm-spl;
        sd-uhs-sdr104;
diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi 
b/arch/arm/dts/imx8mn-beacon-som.dtsi
index de2cd0e320..1133cded9b 100644
--- a/arch/arm/dts/imx8mn-beacon-som.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-som.dtsi
@@ -101,7 +101,7 @@
                #size-cells = <1>;
                compatible = "jedec,spi-nor";
                spi-max-frequency = <80000000>;
-               spi-tx-bus-width = <4>;
+               spi-tx-bus-width = <1>;
                spi-rx-bus-width = <4>;
        };
 };
@@ -120,6 +120,9 @@
                interrupt-parent = <&gpio1>;
                interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                rohm,reset-snvs-powered;
+               #clock-cells = <0>;
+               clocks = <&osc_32k 0>;
+               clock-output-names = "clk-32k-out";
 
                regulators {
                        buck1_reg: BUCK1 {
@@ -262,12 +265,15 @@
 &usdhc1 {
        #address-cells = <1>;
        #size-cells = <0>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+       vmmc-supply = <&buck4_reg>;
+       vqmmc-supply = <&buck5_reg>;
        bus-width = <4>;
        non-removable;
        cap-power-off-card;
-       pm-ignore-notify;
        keep-power-in-suspend;
        mmc-pwrseq = <&usdhc1_pwrseq>;
        status = "okay";
-- 
2.32.0

Reply via email to