This reverts commit b5874b552ffa09bc1dc5dec6b5dd376c62dab45d.

It seems the iMX8MM SDHC controller always reports DAT0 line status
as zero after voltage switch at the end of mmc_switch_voltage(), even
if it is supposed to be high and scope confirms the DAT0 is high.
Reverting this patch makes SDR104 work on iMX8MM, however, it is
not clear why the DAT0 status is not correctly reported by the
controller.

Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Haibo Chen <haibo.c...@nxp.com>
Cc: Igor Opaniuk <igor.opan...@foundries.io>
Cc: Jaehoon Chung <jh80.ch...@samsung.com>
Cc: Peng Fan <peng....@nxp.com>
Cc: Stefano Babic <sba...@denx.de>
---
 drivers/mmc/fsl_esdhc_imx.c | 15 ---------------
 1 file changed, 15 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 9299635f509..5465992ec95 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1552,20 +1552,6 @@ static int __maybe_unused 
fsl_esdhc_set_enhanced_strobe(struct udevice *dev)
        return 0;
 }
 
-static int fsl_esdhc_wait_dat0(struct udevice *dev, int state,
-                               int timeout_us)
-{
-       int ret;
-       u32 tmp;
-       struct fsl_esdhc_priv *priv = dev_get_priv(dev);
-       struct fsl_esdhc *regs = priv->esdhc_regs;
-
-       ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp,
-                               !!(tmp & PRSSTAT_DAT0) == !!state,
-                               timeout_us);
-       return ret;
-}
-
 static const struct dm_mmc_ops fsl_esdhc_ops = {
        .get_cd         = fsl_esdhc_get_cd,
        .send_cmd       = fsl_esdhc_send_cmd,
@@ -1576,7 +1562,6 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
        .set_enhanced_strobe = fsl_esdhc_set_enhanced_strobe,
 #endif
-       .wait_dat0 = fsl_esdhc_wait_dat0,
 };
 
 static struct esdhc_soc_data usdhc_imx7d_data = {
-- 
2.34.1

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