From: Richard Zhu <hongxing....@nxp.com> Add the PCIe PHY support on iMX8MM platforms.
Signed-off-by: Richard Zhu <hongxing....@nxp.com> Tested-by: Marcel Ziswiler <marcel.ziswi...@toradex.com> Reviewed-by: Tim Harvey <thar...@gateworks.com> Tested-by: Tim Harvey <thar...@gateworks.com> Signed-off-by: Shawn Guo <shawn...@kernel.org> Signed-off-by: Marek Vasut <ma...@denx.de> # Pick from Linux b9ec888f636f ("arm64: dts: imx8mm: Add the pcie phy support") --- arch/arm/dts/imx8mm.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi index b142b80734d..63cab127c4c 100644 --- a/arch/arm/dts/imx8mm.dtsi +++ b/arch/arm/dts/imx8mm.dtsi @@ -1041,6 +1041,19 @@ reg = <0x32e50200 0x200>; }; + pcie_phy: pcie-phy@32f00000 { + compatible = "fsl,imx8mm-pcie-phy"; + reg = <0x32f00000 0x10000>; + clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "ref"; + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + assigned-clock-rates = <100000000>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>; + resets = <&src IMX8MQ_RESET_PCIEPHY>; + reset-names = "pciephy"; + #phy-cells = <0>; + status = "disabled"; + }; }; dma_apbh: dma-controller@33000000 { -- 2.34.1