When the cache is enabled in SDRAM we need to flush not only the global data area but also the bd_info struct in relocate_code. This patch now flushed the complete dcache (all dcache lines) via flush_dcache() instead of adding a flush_dcache_range() call for bd_info since this is faster.
Signed-off-by: Stefan Roese <[email protected]> --- arch/powerpc/cpu/ppc4xx/start.S | 13 +++++++------ 1 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index d77272c..99822d7 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -1391,8 +1391,8 @@ in32r: relocate_code: #if defined(CONFIG_4xx_DCACHE) || defined(CONFIG_SYS_INIT_DCACHE_CS) /* - * We need to flush the initial global data (gd_t) before the dcache - * will be invalidated. + * We need to flush the initial global data (gd_t) and bd_info + * before the dcache will be invalidated. */ /* Save registers */ @@ -1400,10 +1400,11 @@ relocate_code: mr r10, r4 mr r11, r5 - /* Flush initial global data range */ - mr r3, r4 - addi r4, r4, generated_gbl_data_s...@l - bl flush_dcache_range + /* + * Flush complete dcache, this is faster than flushing the + * ranges for global_data and bd_info instead. + */ + bl flush_dcache #if defined(CONFIG_SYS_INIT_DCACHE_CS) /* -- 1.7.3.2 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
