It is a valid setup to have no resets, e.g. TI J721E uses such setup.
Accept it without error messages.

And, error out if there is a real issue with getting resets.

Signed-off-by: Nikita Yushchenko <nikita.yo...@cogentembedded.com>
---
 drivers/spi/cadence_qspi.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index d1b3808c4d..76adee49bd 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -201,11 +201,12 @@ static int cadence_spi_probe(struct udevice *bus)
                }
        }
 
-       ret = reset_get_bulk(bus, &priv->resets);
-       if (ret)
-               dev_warn(bus, "Can't get reset: %d\n", ret);
-       else
-               reset_deassert_bulk(&priv->resets);
+       ret = reset_get_bulk_optional(bus, &priv->resets);
+       if (ret) {
+               dev_err(bus, "Can't get reset: %d\n", ret);
+               return ret;
+       }
+       reset_deassert_bulk(&priv->resets);
 
        if (!priv->qspi_is_init) {
                cadence_qspi_apb_controller_init(plat);
-- 
2.30.2

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