From: Sai Pavan Boddu <sai.pavan.bo...@xilinx.com>

During sequential loading of data, hold the bus to prevent controller
from sending stop signal in case no data is available in fifo.

Signed-off-by: Sai Pavan Boddu <sai.pavan.bo...@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.s...@xilinx.com>
Signed-off-by: Michal Simek <michal.si...@xilinx.com>
---

 drivers/i2c/i2c-cdns.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index 07d53be11f12..0da9f6f35a9f 100644
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -257,16 +257,18 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus 
*i2c_bus, u32 addr, u8 *data,
        setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO);
        clrbits_le32(&regs->control, CDNS_I2C_CONTROL_RW);
 
-       /* Check message size against FIFO depth, and set hold bus bit
-        * if it is greater than FIFO depth
+       /*
+        * For sequential data load hold the bus.
         */
-       if (len > CDNS_I2C_FIFO_DEPTH)
+       if (len > 1)
                setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD);
 
        /* Clear the interrupts in status register */
        writel(CDNS_I2C_INTERRUPTS_MASK, &regs->interrupt_status);
 
-       writel(addr, &regs->address);
+       /* In case of Probe (i.e no data), start the transfer */
+       if (!len)
+               writel(addr, &regs->address);
 
        while (len-- && !is_arbitration_lost(regs)) {
                writel(*(cur_data++), &regs->data);
-- 
2.35.1

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