Hi, On 03.03.22 14:41, Gaurav Jain wrote:
Hi StefanoAs we have not received any response from imx6dl_mamoj board maintainer. I propose the below solution --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB - select FSL_CAAM if HAS_CAAM - imply CMD_DEKBLOB if HAS_CAAM + imply FSL_CAAM if HAS_CAAM + imply CMD_DEKBLOB if FSL_CAAM Help
IMO this is ok, I was also wrong, Marek is not the maintainer of this board. This was the only board with broken build - let's say, I will still wait a couple of days, and if there is no comments, I will apply your series (but then V10). I can apply this fix myself, no need to post the series again (I have not seen any other comment or request to change).
Regards, Stefano
--- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_FSL_CAAM=n Need your help to review this or suggest any other solution. Regards Gaurav Jain-----Original Message----- From: Stefano Babic <sba...@denx.de> Sent: Thursday, March 3, 2022 6:32 PM To: Gaurav Jain <gaurav.j...@nxp.com>; Stefano Babic <sba...@denx.de>; u- b...@lists.denx.de; Marek Vasut <ma...@denx.de> Cc: Fabio Estevam <feste...@gmail.com>; Peng Fan <peng....@nxp.com>; Simon Glass <s...@chromium.org>; Priyanka Jain <priyanka.j...@nxp.com>; Ye Li <ye...@nxp.com>; Horia Geanta <horia.gea...@nxp.com>; Ji Luo <ji....@nxp.com>; Franck Lenormand <franck.lenorm...@nxp.com>; Silvano Di Ninno <silvano.dini...@nxp.com>; Sahil Malhotra <sahil.malho...@nxp.com>; Pankaj Gupta <pankaj.gu...@nxp.com>; Varun Sethi <v.se...@nxp.com>; dl- uboot-imx <uboot-...@nxp.com>; Shengzhou Liu <shengzhou....@nxp.com>; Mingkai Hu <mingkai...@nxp.com>; Rajesh Bhagat <rajesh.bha...@nxp.com>; Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>; Wasim Khan <wasim.k...@nxp.com>; Alison Wang <alison.w...@nxp.com>; Pramod Kumar <pramod.kuma...@nxp.com>; Andy Tang <andy.t...@nxp.com>; Adrian Alonso <adrian.alo...@nxp.com>; Vladimir Oltean <olte...@gmail.com> Subject: Re: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring driver model Caution: EXT Email On 03.03.22 13:44, Gaurav Jain wrote:Hello Stefano A gentle reminder!! Need your help to check the proposed solution to fix imx6dl_mamoj SPL sizeissue shared in last mail. Ouch...is there a solution ? I confess I have not seen, is there an answer by Marek ? Regards, StefanoRegards Gaurav Jain-----Original Message----- From: Gaurav Jain Sent: Friday, February 25, 2022 12:33 PM To: Stefano Babic <sba...@denx.de>; u-boot@lists.denx.de; Marek Vasut <ma...@denx.de> Cc: Fabio Estevam <feste...@gmail.com>; Peng Fan <peng....@nxp.com>; Simon Glass <s...@chromium.org>; Priyanka Jain <priyanka.j...@nxp.com>; Ye Li <ye...@nxp.com>; Horia Geanta <horia.gea...@nxp.com>; Ji Luo <ji....@nxp.com>; Franck Lenormand <franck.lenorm...@nxp.com>; Silvano Di Ninno <silvano.dini...@nxp.com>; Sahil Malhotra <sahil.malho...@nxp.com>; Pankaj Gupta <pankaj.gu...@nxp.com>; Varun Sethi <v.se...@nxp.com>; dl- uboot-imx <uboot-...@nxp.com>; Shengzhou Liu <shengzhou....@nxp.com>; Mingkai Hu <mingkai...@nxp.com>; Rajesh Bhagat <rajesh.bha...@nxp.com>; Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>; Wasim Khan <wasim.k...@nxp.com>;AlisonWang <alison.w...@nxp.com>; Pramod Kumar<pramod.kuma...@nxp.com>;Andy Tang <andy.t...@nxp.com>; Adrian Alonso <adrian.alo...@nxp.com>; Vladimir Oltean <olte...@gmail.com> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring driver model Hello Stefano-----Original Message----- From: Gaurav Jain Sent: Friday, February 11, 2022 3:09 PM To: Stefano Babic <sba...@denx.de>; u-boot@lists.denx.de; Marek Vasut <ma...@denx.de> Cc: Fabio Estevam <feste...@gmail.com>; Peng Fan <peng....@nxp.com>; Simon Glass <s...@chromium.org>; Priyanka Jain <priyanka.j...@nxp.com>; Ye Li <ye...@nxp.com>; Horia Geanta <horia.gea...@nxp.com>; Ji Luo <ji....@nxp.com>; Franck Lenormand <franck.lenorm...@nxp.com>; Silvano Di Ninno <silvano.dini...@nxp.com>; Sahil Malhotra <sahil.malho...@nxp.com>; Pankaj Gupta <pankaj.gu...@nxp.com>; Varun Sethi <v.se...@nxp.com>; dl- uboot-imx <uboot-...@nxp.com>; Shengzhou Liu <shengzhou....@nxp.com>; Mingkai Hu <mingkai...@nxp.com>; Rajesh Bhagat <rajesh.bha...@nxp.com>; Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>; Wasim Khan <wasim.k...@nxp.com>;AlisonWang <alison.w...@nxp.com>; Pramod Kumar<pramod.kuma...@nxp.com>;Andy Tang <andy.t...@nxp.com>; Adrian Alonso <adrian.alo...@nxp.com>; Vladimir Oltean <olte...@gmail.com> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring driver model Hello Marek A gentle reminder!! Please help to check if some feature can be dropped in SPL from imx6dl_mamoj board so that CAAM driver model patches can be accepted. Regards Gaurav Jain-----Original Message----- From: Gaurav Jain Sent: Monday, February 7, 2022 12:43 PM To: Stefano Babic <sba...@denx.de>; u-boot@lists.denx.de; Marek Vasut <ma...@denx.de> Cc: Fabio Estevam <feste...@gmail.com>; Peng Fan <peng....@nxp.com>; Simon Glass <s...@chromium.org>; Priyanka Jain <priyanka.j...@nxp.com>; Ye Li <ye...@nxp.com>; Horia Geanta <horia.gea...@nxp.com>; Ji Luo <ji....@nxp.com>; Franck Lenormand <franck.lenorm...@nxp.com>; Silvano Di Ninno <silvano.dini...@nxp.com>; Sahil Malhotra <sahil.malho...@nxp.com>; Pankaj Gupta <pankaj.gu...@nxp.com>; Varun Sethi <v.se...@nxp.com>; dl- uboot-imx <uboot-...@nxp.com>; Shengzhou Liu <shengzhou....@nxp.com>; Mingkai Hu <mingkai...@nxp.com>; Rajesh Bhagat <rajesh.bha...@nxp.com>; Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>; Wasim Khan <wasim.k...@nxp.com>;AlisonWang <alison.w...@nxp.com>; Pramod Kumar<pramod.kuma...@nxp.com>;Andy Tang <andy.t...@nxp.com>; Adrian Alonso <adrian.alo...@nxp.com>; Vladimir Oltean <olte...@gmail.com> Subject: RE: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring driver model Hello Marek-----Original Message----- From: Stefano Babic <sba...@denx.de> Sent: Saturday, February 5, 2022 7:46 PM To: Gaurav Jain <gaurav.j...@nxp.com>; u-boot@lists.denx.de Cc: Stefano Babic <sba...@denx.de>; Fabio Estevam <feste...@gmail.com>; Peng Fan <peng....@nxp.com>; Simon Glass <s...@chromium.org>; Priyanka Jain <priyanka.j...@nxp.com>; Ye Li <ye...@nxp.com>; Horia Geanta <horia.gea...@nxp.com>; Ji Luo <ji....@nxp.com>; Franck Lenormand <franck.lenorm...@nxp.com>; Silvano Di Ninno <silvano.dini...@nxp.com>; Sahil Malhotra <sahil.malho...@nxp.com>; Pankaj Gupta <pankaj.gu...@nxp.com>; Varun Sethi <v.se...@nxp.com>; dl-uboot-imx <uboot-...@nxp.com>; Shengzhou Liu <shengzhou....@nxp.com>; Mingkai Hu <mingkai...@nxp.com>; Rajesh Bhagat <rajesh.bha...@nxp.com>; Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>; Wasim Khan <wasim.k...@nxp.com>;AlisonWang <alison.w...@nxp.com>; Pramod Kumar<pramod.kuma...@nxp.com>;Andy Tang <andy.t...@nxp.com>; Adrian Alonso <adrian.alo...@nxp.com>; Vladimir Oltean <olte...@gmail.com>; Marek Vasut <ma...@denx.de> Subject: [EXT] Re: [PATCH v8 01/15] crypto/fsl: Add support for CAAM Job ring driver model Caution: EXT Email Hi Gaurav, rather I still have issues to run CI with this applied. The reason is that this adds an overhead to SPL and it breaks the board imx6dl_mamoj because SPL exceeds the maximum size for a DL SOC. See https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F so ur ce.d enx.de%2Fu-boot%2Fcustodians%2Fu-boot-imx%2F- %2Fjobs%2F387370&data=04%7C01%7Cgaurav.jain%40nxp.com%7C3a2731dd27fc4bebcad308d9e8b21464%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637796673834942697%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=pI%2F%2FlNtrdrGCa8sSvcr6uNu4jze7pzDqZtI52FIDj50%3D&reserved=0 I do not know if it is possible to drop some features from SPL for this board (Added Marek as board maintainer).As we have not received any response from imx6dl_mamoj board maintainer. I propose the below solution --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -49,8 +49,8 @@ config USE_IMXIMG_PLUGIN config IMX_HAB - select FSL_CAAM if HAS_CAAM - imply CMD_DEKBLOB if HAS_CAAM + imply FSL_CAAM if HAS_CAAM + imply CMD_DEKBLOB if FSL_CAAM Help --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -59,3 +59,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_FSL_CAAM=n Need your help to review this or suggest any other solution. Regards Gaurav JainCONFIG_IMX_HAB is enabled for imx6dl_mamoj. So CAAM is built for SPL, results in increased size. However CAAM is not initialized in SPL. As Stefano suggested, Can you drop some features from SPL? Regards Gaurav JainBest regards, Stefano On 10.01.22 13:27, Gaurav Jain wrote:added device tree support for job ring driver. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.j...@nxp.com> Reviewed-by: Ye Li <ye...@nxp.com> --- drivers/crypto/fsl/jr.c | 323 ++++++++++++++++++++++++++--------------drivers/crypto/fsl/jr.h | 31 +++- 2 files changed, 240 insertions(+), 114 deletions(-) diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 22b649219e..8103987425 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018, 2021 NXP * * Based on CAAM driver in drivers/crypto/caam in Linux */ @@ -11,7 +11,6 @@ #include <linux/kernel.h> #include <log.h> #include <malloc.h> -#include "fsl_sec.h" #include "jr.h" #include "jobdesc.h" #include "desc_constr.h" @@ -21,7 +20,10 @@ #include <asm/cache.h> #include <asm/fsl_pamu.h> #endif +#include <dm.h> #include <dm/lists.h> +#include <dm/root.h> +#include <dm/device-internal.h> #include <linux/delay.h> #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1)) @@ -35,20 +37,29 @@ uint32_tsec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = {#endif }; +#if CONFIG_IS_ENABLED(DM) +struct udevice *caam_dev; +#else #define SEC_ADDR(idx) \ (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) #define SEC_JR0_ADDR(idx) \ (ulong)(SEC_ADDR(idx) + \ (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET)) +struct caam_regs caam_st; +#endif -struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; +static inline u32 jr_start_reg(u8 jrid) { + return (1 << jrid); +} -static inline void start_jr0(uint8_t sec_idx) +static inline void start_jr(struct caam_regs *caam) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); + ccsr_sec_t *sec = caam->sec; u32 ctpr_ms = sec_in32(&sec->ctpr_ms); u32 scfgr = sec_in32(&sec->scfgr); + u32 jrstart = jr_start_reg(caam->jrid); if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) { /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or @@ -56,23 +67,16 @@ static inline void start_jr0(uint8_t sec_idx) */ if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) || (scfgr & SEC_SCFGR_VIRT_EN)) - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); + sec_out32(&sec->jrstartr, jrstart); } else { /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */ if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) - sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0); + sec_out32(&sec->jrstartr, jrstart); } } -static inline void jr_reset_liodn(uint8_t sec_idx) +static inline void jr_disable_irq(struct jr_regs *regs) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); - sec_out32(&sec->jrliodnr[0].ls, 0); -} - -static inline void jr_disable_irq(uint8_t sec_idx) -{ - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); uint32_t jrcfg = sec_in32(®s->jrcfg1); jrcfg = jrcfg | JR_INTMASK; @@ -80,10 +84,10 @@ static inline void jr_disable_irq(uint8_t sec_idx) sec_out32(®s->jrcfg1, jrcfg); } -static void jr_initregs(uint8_t sec_idx) +static void jr_initregs(uint8_t sec_idx, struct caam_regs +*caam) { - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - struct jobring *jr = &jr0[sec_idx]; + struct jr_regs *regs = caam->regs; + struct jobring *jr = &caam->jr[sec_idx]; caam_dma_addr_t ip_base = virt_to_phys((void *)jr->input_ring); caam_dma_addr_t op_base = virt_to_phys((void *)jr->output_ring); @@ -103,16 +107,16 @@ static void jr_initregs(uint8_t sec_idx) sec_out32(®s->irs, JR_SIZE); if (!jr->irq) - jr_disable_irq(sec_idx); + jr_disable_irq(regs); } -static int jr_init(uint8_t sec_idx) +static int jr_init(uint8_t sec_idx, struct caam_regs *caam) { - struct jobring *jr = &jr0[sec_idx]; + struct jobring *jr = &caam->jr[sec_idx]; memset(jr, 0, sizeof(struct jobring)); - jr->jq_id = DEFAULT_JR_ID; + jr->jq_id = caam->jrid; jr->irq = DEFAULT_IRQ; #ifdef CONFIG_FSL_CORENET @@ -134,53 +138,8 @@ static int jr_init(uint8_t sec_idx) memset(jr->input_ring, 0, JR_SIZE * sizeof(caam_dma_addr_t)); memset(jr->output_ring, 0, jr->op_size); - start_jr0(sec_idx); - - jr_initregs(sec_idx); - - return 0; -} - -static int jr_sw_cleanup(uint8_t sec_idx) -{ - struct jobring *jr = &jr0[sec_idx]; - - jr->head = 0; - jr->tail = 0; - jr->read_idx = 0; - jr->write_idx = 0; - memset(jr->info, 0, sizeof(jr->info)); - memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); - memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring)); - - return 0; -} - -static int jr_hw_reset(uint8_t sec_idx) -{ - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - uint32_t timeout = 100000; - uint32_t jrint, jrcr; - - sec_out32(®s->jrcr, JRCR_RESET); - do { - jrint = sec_in32(®s->jrint); - } while (((jrint & JRINT_ERR_HALT_MASK) == - JRINT_ERR_HALT_INPROGRESS) && --timeout); - - jrint = sec_in32(®s->jrint); - if (((jrint & JRINT_ERR_HALT_MASK) != - JRINT_ERR_HALT_INPROGRESS) && timeout == 0) - return -1; - - timeout = 100000; - sec_out32(®s->jrcr, JRCR_RESET); - do { - jrcr = sec_in32(®s->jrcr); - } while ((jrcr & JRCR_RESET) && --timeout); - - if (timeout == 0) - return -1; + start_jr(caam); + jr_initregs(sec_idx, caam); return 0; } @@ -188,10 +147,10 @@ static int jr_hw_reset(uint8_t sec_idx) /* -1 --- error, can't enqueue -- no space available */ static int jr_enqueue(uint32_t *desc_addr, void (*callback)(uint32_t status, void *arg), - void *arg, uint8_t sec_idx) + void *arg, uint8_t sec_idx, struct caam_regs *caam) { - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - struct jobring *jr = &jr0[sec_idx]; + struct jr_regs *regs = caam->regs; + struct jobring *jr = &caam->jr[sec_idx]; int head = jr->head; uint32_t desc_word; int length = desc_len(desc_addr); @@ -263,10 +222,10 @@ static int jr_enqueue(uint32_t *desc_addr, return 0; } -static int jr_dequeue(int sec_idx) +static int jr_dequeue(int sec_idx, struct caam_regs *caam) { - struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); - struct jobring *jr = &jr0[sec_idx]; + struct jr_regs *regs = caam->regs; + struct jobring *jr = &caam->jr[sec_idx]; int head = jr->head; int tail = jr->tail; int idx, i, found; @@ -349,14 +308,18 @@ static void desc_done(uint32_t status, void*arg){ struct result *x = arg; x->status = status; -#ifndef CONFIG_SPL_BUILD caam_jr_strstatus(status); -#endif x->done = 1; } static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) { + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + caam = dev_get_priv(caam_dev); #else + caam = &caam_st; +#endif unsigned long long timeval = 0; unsigned long long timeout = CONFIG_USEC_DEQ_TIMEOUT; struct result op; @@ -364,7 +327,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx) memset(&op, 0, sizeof(op)); - ret = jr_enqueue(desc, desc_done, &op, sec_idx); + ret = jr_enqueue(desc, desc_done, &op, sec_idx, caam); if (ret) { debug("Error in SEC enq\n"); ret = JQ_ENQ_ERR; @@ -375,7 +338,7 @@ static inline int run_descriptor_jr_idx(uint32_t *desc,uint8_t sec_idx)udelay(1); timeval += 1; - ret = jr_dequeue(sec_idx); + ret = jr_dequeue(sec_idx, caam); if (ret) { debug("Error in SEC deq\n"); ret = JQ_DEQ_ERR; @@ -402,13 +365,62 @@ int run_descriptor_jr(uint32_t *desc) return run_descriptor_jr_idx(desc, 0); } +static int jr_sw_cleanup(uint8_t sec_idx, struct caam_regs *caam) { + struct jobring *jr = &caam->jr[sec_idx]; + + jr->head = 0; + jr->tail = 0; + jr->read_idx = 0; + jr->write_idx = 0; + memset(jr->info, 0, sizeof(jr->info)); + memset(jr->input_ring, 0, jr->size * sizeof(caam_dma_addr_t)); + memset(jr->output_ring, 0, jr->size * sizeof(struct + op_ring)); + + return 0; +} + +static int jr_hw_reset(struct jr_regs *regs) { + uint32_t timeout = 100000; + uint32_t jrint, jrcr; + + sec_out32(®s->jrcr, JRCR_RESET); + do { + jrint = sec_in32(®s->jrint); + } while (((jrint & JRINT_ERR_HALT_MASK) == + JRINT_ERR_HALT_INPROGRESS) && --timeout); + + jrint = sec_in32(®s->jrint); + if (((jrint & JRINT_ERR_HALT_MASK) != + JRINT_ERR_HALT_INPROGRESS) && timeout == 0) + return -1; + + timeout = 100000; + sec_out32(®s->jrcr, JRCR_RESET); + do { + jrcr = sec_in32(®s->jrcr); + } while ((jrcr & JRCR_RESET) && --timeout); + + if (timeout == 0) + return -1; + + return 0; +} + static inline int jr_reset_sec(uint8_t sec_idx) { - if (jr_hw_reset(sec_idx) < 0) + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + caam = dev_get_priv(caam_dev); #else + caam = &caam_st; +#endif + if (jr_hw_reset(caam->regs) < 0) return -1; /* Clean up the jobring structure maintained by software */ - jr_sw_cleanup(sec_idx); + jr_sw_cleanup(sec_idx, caam); return 0; } @@ -418,9 +430,15 @@ int jr_reset(void) return jr_reset_sec(0); } -static inline int sec_reset_idx(uint8_t sec_idx) +int sec_reset(void) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + caam = dev_get_priv(caam_dev); #else + caam = &caam_st; +#endif + ccsr_sec_t *sec = caam->sec; uint32_t mcfgr = sec_in32(&sec->mcfgr); uint32_t timeout = 100000; @@ -446,11 +464,7 @@ static inline int sec_reset_idx(uint8_t sec_idx) return 0; } -int sec_reset(void) -{ - return sec_reset_idx(0); -} -#ifndef CONFIG_SPL_BUILD + static int deinstantiate_rng(u8 sec_idx, int state_handle_mask) { u32 *desc; @@ -496,12 +510,11 @@ static int deinstantiate_rng(u8 sec_idx, intstate_handle_mask)return ret; } -static int instantiate_rng(u8 sec_idx, int gen_sk) +static int instantiate_rng(uint8_t sec_idx, ccsr_sec_t *sec, int +gen_sk) { u32 *desc; u32 rdsta_val; int ret = 0, sh_idx, size; - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem*)SEC_ADDR(sec_idx);struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; @@ -554,9 +567,8 @@ static int instantiate_rng(u8 sec_idx, int gen_sk) return ret; } -static u8 get_rng_vid(uint8_t sec_idx) +static u8 get_rng_vid(ccsr_sec_t *sec) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); u8 vid; if (caam_get_era() < 10) { @@ -574,9 +586,8 @@ static u8 get_rng_vid(uint8_t sec_idx) * By default, the TRNG runs for 200 clocks per sample; * 1200 clocks per sample generates better entropy. */ -static void kick_trng(int ent_delay, uint8_t sec_idx) +static void kick_trng(int ent_delay, ccsr_sec_t *sec) { - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem*)SEC_ADDR(sec_idx);struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; u32 val; @@ -603,10 +614,9 @@ static void kick_trng(int ent_delay, uint8_tsec_idx)sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); } -static int rng_init(uint8_t sec_idx) +static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) { int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; - ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem*)SEC_ADDR(sec_idx);struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; u32 inst_handles; @@ -624,7 +634,7 @@ static int rng_init(uint8_t sec_idx) * the TRNG parameters. */ if (!inst_handles) { - kick_trng(ent_delay, sec_idx); + kick_trng(ent_delay, sec); ent_delay += 400; } /* @@ -634,7 +644,7 @@ static int rng_init(uint8_t sec_idx) * interval, leading to a sucessful initialization of * the RNG. */ - ret = instantiate_rng(sec_idx, gen_sk); + ret = instantiate_rng(sec_idx, sec, gen_sk); } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); if (ret) { printf("SEC%u: Failed to instantiate RNG\n", sec_idx); @@ -646,13 +656,28 @@ static int rng_init(uint8_t sec_idx) return ret; } -#endif + int sec_init_idx(uint8_t sec_idx) { - ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); - uint32_t mcr = sec_in32(&sec->mcfgr); int ret = 0; - + struct caam_regs *caam; +#if CONFIG_IS_ENABLED(DM) + if (!caam_dev) { + printf("caam_jr: caam not found\n"); + return -1; + } + caam = dev_get_priv(caam_dev); #else + caam_st.sec = (void *)SEC_ADDR(sec_idx); + caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx); + caam_st.jrid = 0; + caam = &caam_st; +#endif + ccsr_sec_t *sec = caam->sec; + uint32_t mcr = sec_in32(&sec->mcfgr); #if +defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) + uint32_t jrdid_ms = 0; +#endif #ifdef CONFIG_FSL_CORENET uint32_t liodnr; uint32_t liodn_ns; @@ -682,6 +707,11 @@ int sec_init_idx(uint8_t sec_idx) mcr |= (1 << MCFGR_PS_SHIFT); #endif sec_out32(&sec->mcfgr, mcr); +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX8M) + jrdid_ms = JRDID_MS_TZ_OWN | JRDID_MS_PRIM_TZ |JRDID_MS_PRIM_DID;+ sec_out32(&sec->jrliodnr[caam->jrid].ms, jrdid_ms); #endif + jr_reset(); #ifdef CONFIG_FSL_CORENET #ifdef CONFIG_SPL_BUILD @@ -693,20 +723,19 @@ int sec_init_idx(uint8_t sec_idx) liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; - liodnr = sec_in32(&sec->jrliodnr[0].ls) & + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls) & ~(JRNSLIODN_MASK | JRSLIODN_MASK); liodnr = liodnr | (liodn_ns << JRNSLIODN_SHIFT) | (liodn_s << JRSLIODN_SHIFT); - sec_out32(&sec->jrliodnr[0].ls, liodnr); + sec_out32(&sec->jrliodnr[caam->jrid].ls, liodnr); #else - liodnr = sec_in32(&sec->jrliodnr[0].ls); + liodnr = sec_in32(&sec->jrliodnr[caam->jrid].ls); liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; #endif #endif - - ret = jr_init(sec_idx); + ret = jr_init(sec_idx, caam); if (ret < 0) { printf("SEC%u: initialization failed\n", sec_idx); return -1; @@ -719,9 +748,9 @@ int sec_init_idx(uint8_t sec_idx) pamu_enable(); #endif -#ifndef CONFIG_SPL_BUILD - if (get_rng_vid(sec_idx) >= 4) { - if (rng_init(sec_idx) < 0) { + + if (get_rng_vid(caam->sec) >= 4) { + if (rng_init(sec_idx, caam->sec) < 0) { printf("SEC%u: RNG instantiation failed\n", sec_idx); return -1; } @@ -735,7 +764,6 @@ int sec_init_idx(uint8_t sec_idx) printf("SEC%u: RNG instantiated\n", sec_idx); } -#endif return ret; } @@ -743,3 +771,76 @@ int sec_init(void) { return sec_init_idx(0); } + +#if CONFIG_IS_ENABLED(DM) +static int caam_jr_ioctl(struct udevice *dev, unsigned long +request, void *buf) { + if (request != CAAM_JR_RUN_DESC) + return -ENOSYS; + + return run_descriptor_jr(buf); } + +static int caam_jr_probe(struct udevice *dev) { + struct caam_regs *caam = dev_get_priv(dev); + fdt_addr_t addr; + ofnode node; + unsigned int jr_node = 0; + + caam_dev = dev; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) { + printf("caam_jr: crypto not found\n"); + return -EINVAL; + } + caam->sec = (ccsr_sec_t *)(uintptr_t)addr; + caam->regs = (struct jr_regs *)caam->sec; + + /* Check for enabled job ring node */ + ofnode_for_each_subnode(node, dev_ofnode(dev)) { + if (!ofnode_is_available(node)) + continue; + + jr_node = ofnode_read_u32_default(node, "reg", -1); + if (jr_node > 0) { + caam->regs = (struct jr_regs *)((ulong)caam->sec + jr_node); + while (!(jr_node & 0x0F)) + jr_node = jr_node >> 4; + + caam->jrid = jr_node - 1; + break; + } + } + + if (sec_init()) + printf("\nsec_init failed!\n"); + + return 0; +} + +static int caam_jr_bind(struct udevice *dev) { + return 0; +} + +static const struct misc_ops caam_jr_ops = { + .ioctl = caam_jr_ioctl, +}; + +static const struct udevice_id caam_jr_match[] = { + { .compatible = "fsl,sec-v4.0" }, + { } +}; + +U_BOOT_DRIVER(caam_jr) = { + .name = "caam_jr", + .id = UCLASS_MISC, + .of_match = caam_jr_match, + .ops = &caam_jr_ops, + .bind = caam_jr_bind, + .probe = caam_jr_probe, + .priv_auto = sizeof(struct caam_regs), +}; +#endif diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h index 1047aa772c..3eb7be79da 100644 --- a/drivers/crypto/fsl/jr.h +++ b/drivers/crypto/fsl/jr.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2008-2014 Freescale Semiconductor, Inc. + * Copyright 2021 NXP * */ @@ -8,7 +9,9 @@ #define __JR_H #include <linux/compiler.h> +#include "fsl_sec.h" #include "type.h" +#include <misc.h> #define JR_SIZE 4 /* Timeout currently defined as 10 sec */ @@ -35,12 +38,21 @@ #define JRSLIODN_SHIFT 0 #define JRSLIODN_MASK 0x00000fff -#define JQ_DEQ_ERR -1 -#define JQ_DEQ_TO_ERR -2 -#define JQ_ENQ_ERR -3 +#define JRDID_MS_PRIM_DID BIT(0) +#define JRDID_MS_PRIM_TZ BIT(4) +#define JRDID_MS_TZ_OWN BIT(15) + +#define JQ_DEQ_ERR (-1) +#define JQ_DEQ_TO_ERR (-2) +#define JQ_ENQ_ERR (-3) #define RNG4_MAX_HANDLES 2 +enum { + /* Run caam jobring descriptor(in buf) */ + CAAM_JR_RUN_DESC, +}; + struct op_ring { caam_dma_addr_t desc; uint32_t status; @@ -102,6 +114,19 @@ struct result { uint32_t status; }; +/* + * struct caam_regs - CAAM initialization register interface + * + * Interface to caam memory map, jobring register, jobring storage. + */ +struct caam_regs { + ccsr_sec_t *sec; /*caam initialization registers*/ + struct jr_regs *regs; /*jobring configuration registers*/ + u8 jrid; /*id to identify a jobring*/ + /*Private sub-storage for a single JobR*/ + struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; +}; + void caam_jr_strstatus(u32 status); int run_descriptor_jr(uint32_t *desc);--===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de=====================================================================-- ================================================================= ==== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de ================================================================= ====
-- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =====================================================================
