On Mon, Mar 14, 2022 at 4:56 AM Kever Yang <kever.y...@rock-chips.com> wrote:
>
> Hi Peter,
>
>      Thanks for your patchset.
>
>      Seems like some of the driver module author does not include in the
> patch cc list, I would suggest you to use scripts/get_maintainer.pl
> instead of add cc manually

I do use scripts/get_maintainer.pl automatically, which fails
hilariously at the cover letter.
I then bring anyone who's listed as a maintainer into the cover letter
as well as the mailing lists manually by running it on the entire
patch series.
If someone is missing, then the maintainers file isn't grabbing them.
I saw a patch recently to help with that.

>
> tools/patman/patman is a very wonderful tool, you can have a try :)

I'll look into this!

>
>
> Thanks,
>
> - Kever

Always,
Peter

>
> On 2022/2/22 09:31, Peter Geis wrote:
> > to: Simon Glass <s...@chromium.org>
> > to: Philipp Tomsich <philipp.toms...@vrull.eu>
> > to: Kever Yang <kever.y...@rock-chips.com>
> > to: Lukasz Majewski <lu...@denx.de>
> > to: Sean Anderson <sean...@gmail.com>
> > to: Peng Fan <peng....@nxp.com>
> > to: Jaehoon Chung <jh80.ch...@samsung.com>
> > to: Heiko Stübner <he...@sntech.de>
> > cc: u-boot@lists.denx.de
> >
> > Good Evening,
> >
> > The following is a few patches for rockchip mainline u-boot support.
> > Patches 1-3 are fixes for the rk3568 reset handler, rockchip emmc dma to
> > sram, and building the rockchip-sfc driver.
> > Patch 4 adds a sanity check for the minimum sfc frequency.
> > Patch 5 and 6 add adc support to spl and enable the rockchip recovery
> > handler in spl, before attempting to load u-boot.
> > Patch 7 enables rk3568 spl bootrom device detection.
> > Patch 8 enables automatic clock gating and other power saving features
> > on rk3568, which solves the chip running hotter compared to downstream.
> > Patch 9 and 10 move the dwc3 platform data to the chip specific code and
> > enable dwc3 otg support on rk3568.
> > Patch 11 is an RFC patch for fixing ram detection on rk3568. Downstream
> > goes about this a different way, where they implemented a special
> > library to handle this.
> >
> > Please review and *especially test* patch 11.
> >
> > Very Respectfully,
> > Peter Geis
> >
> > Peter Geis (11):
> >    clk: rockchip: rk3568: fix reset handler
> >    mmc: sdhci: allow disabling sdma in spl
> >    spi: rockchip-sfc: fix building rockchip-sfc
> >    spi: rockchip-sfc: sanity check minimum freq
> >    spl: support adc drivers in spl
> >    rockchip: handle bootrom recovery mode in spl
> >    rockchip: rk3568: add boot device detection
> >    rockchip: rk3568: enable automatic clock gating
> >    rockchip: move dwc3 config to chip specific handler
> >    rockchip: rk3568: add dwc3 otg support
> >    [RFC] rockchip: rk356x: attempt to fix ram detection
> >
> >   arch/arm/mach-rockchip/Kconfig         |   1 +
> >   arch/arm/mach-rockchip/Makefile        |   6 +-
> >   arch/arm/mach-rockchip/board.c         |  24 ------
> >   arch/arm/mach-rockchip/boot_mode.c     |   4 +-
> >   arch/arm/mach-rockchip/rk3399/rk3399.c |  29 +++++++
> >   arch/arm/mach-rockchip/rk3568/rk3568.c | 112 +++++++++++++++++++++++++
> >   arch/arm/mach-rockchip/sdram.c         |  19 +++--
> >   common/board_f.c                       |   7 ++
> >   common/spl/Kconfig                     |   5 ++
> >   drivers/Makefile                       |   1 +
> >   drivers/clk/rockchip/clk_rk3568.c      |   2 +
> >   drivers/mmc/Kconfig                    |   7 ++
> >   drivers/mmc/sdhci.c                    |   6 +-
> >   drivers/spi/rockchip_sfc.c             |   6 ++
> >   include/configs/rk3568_common.h        |   5 ++
> >   15 files changed, 197 insertions(+), 37 deletions(-)
> >

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