Hi Patrick
On 2/23/22 08:41, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 2/1/22 14:02, Patrick Delaunay wrote:
>> From: Gabriel Fernandez <gabriel.fernan...@foss.st.com>
>>
>> The clk_set_rate() function returns rate as an 'ulong' not
>> an 'int' and rate > 0 by default.
>>
>> This patch avoids to display the associated warning when
>> the set rate function returns the new frequency.
>>
>> Fixes: aeaf330649e8 ("video: stm32: stm32_ltdc: add bridge to display
>> controller")
>> Signed-off-by: Gabriel Fernandez <gabriel.fernan...@foss.st.com>
>> Signed-off-by: Patrick Delaunay <patrick.delau...@foss.st.com>
>> ---
>>
>> drivers/video/stm32/stm32_ltdc.c | 11 ++++++-----
>> 1 file changed, 6 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/video/stm32/stm32_ltdc.c
>> b/drivers/video/stm32/stm32_ltdc.c
>> index 87e5fd54d9..e741e74739 100644
>> --- a/drivers/video/stm32/stm32_ltdc.c
>> +++ b/drivers/video/stm32/stm32_ltdc.c
>> @@ -338,6 +338,7 @@ static int stm32_ltdc_probe(struct udevice *dev)
>> struct display_timing timings;
>> struct clk pclk;
>> struct reset_ctl rst;
>> + ulong rate;
>> int ret;
>>
>> priv->regs = (void *)dev_read_addr(dev);
>> @@ -375,13 +376,13 @@ static int stm32_ltdc_probe(struct udevice *dev)
>> }
>> }
>>
>> - ret = clk_set_rate(&pclk, timings.pixelclock.typ);
>> - if (ret)
>> - dev_warn(dev, "fail to set pixel clock %d hz\n",
>> - timings.pixelclock.typ);
>> + rate = clk_set_rate(&pclk, timings.pixelclock.typ);
>> + if (IS_ERR_VALUE(rate))
>> + dev_warn(dev, "fail to set pixel clock %d hz, ret=%ld\n",
>> + timings.pixelclock.typ, rate);
>>
>> dev_dbg(dev, "Set pixel clock req %d hz get %ld hz\n",
>> - timings.pixelclock.typ, clk_get_rate(&pclk));
>> + timings.pixelclock.typ, rate);
>>
>> ret = reset_get_by_index(dev, 0, &rst);
>> if (ret) {
>
> Reviewed-by: Patrice Chotard <patrice.chot...@foss.st.com>
>
> Thanks
> Patrice
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Applied to u-boot-stm32
Thanks
Patrice
