On 2022-03-16 07:02, Heiko Thiery wrote:
Hi Angus,
[snip]
>
> Meanwhile I figured out what the problem is with the 'No serial driver
> found'. In the used dtb there are 'assigned-clocks' and
> 'assigned-clock-parents' set in the uart nodes. When removing this the
> serial will work. I have to admit that I do not know why this is set
> that way. I can only imagine that this was taken from the uboot-imx
> tree.
>
> ---
> assigned-clocks = <&clk IMX8MQ_CLK_UART1>;
> assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
> ---
>
Does that solve the reboot ?
Yes, when I remove these assigned-clocks from my dtb the issue is
solved and the board finds the serial driver and starts correctly.
> see also here:
>
https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/dts/imx8mq-kontron-pitx-imx8m.dts#L315
If that works for Linux it should also work for u-boot. It may be that
the SYS1_PLL_80M isn't set correctly or that the CLK_UART1 mux isn't
correctly setup. If you enable DEBUG in clk-uclass I might be able to
figure out were the problem is.
The problem is that the IMX8MQ_CLK_UART1 is not found and that is the
reason that the probe fails. I tried to add the missing clocks to how
it is done in the kernel.
see here: https://pastebin.com/raw/iYYMHEdy
Looking at that you shouldn't need
+ clk_dm(IMX8MQ_CLK_25M, clk_register_fixed_rate(NULL,
"clock-osc-25m", 25000000));
+ clk_dm(IMX8MQ_CLK_25M, clk_register_fixed_rate(NULL,
"clock-osc-27m", 27000000));
Those get correctly probed by the clock-controller.
The rest of it looks OK and could be a follow on patch to the clock
driver,
But then something went wrong when probing uart3 ... the baudrate
switched for the uart2 (console) and the serial output became broken.
Later when the kernel starts the output becomes correct again. So the
kernel seems to configure it correctly.
see here: https://pastebin.com/raw/qXVShb3Q
When I remove the "assigned-clock-parents = <&clk
IMX8MQ_SYS1_PLL_80M>;" for uart3 the output of uart2 (console) keeps
ok.
If that "fixes" it then it means that the parent IMX8MQ_SYS1_PLL_80M
clock rate is getting changed by the uart3 stanza.
Are you using the mainline devicetree file for your board ? If not could
you provide a link ?
