[PATCH v3 20/29] arm64: Save spsr in pt_regs

[Sean Anderson]

This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.

Signed-off-by: Sean Anderson <sean.ander...@seco.com>
---

Changes in v3:
- Fix loading the wrong EL's SPSR

Changes in v2:
- New

 arch/arm/cpu/armv8/exceptions.S         | 5 ++++-
 arch/arm/include/asm/proc-armv/ptrace.h | 2 +-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 001913f429..504d566721 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -77,15 +77,18 @@ _save_el_regs:
        switch_el x11, 3f, 2f, 1f
 3:     mrs     x1, esr_el3
        mrs     x2, elr_el3
+       mrs     x3, spsr_el3
        b       0f
 2:     mrs     x1, esr_el2
        mrs     x2, elr_el2
+       mrs     x3, spsr_el2
        b       0f
 1:     mrs     x1, esr_el1
        mrs     x2, elr_el1
+       mrs     x3, spsr_el1
 0:
        stp     x1, x0, [sp, #-16]!
-       stp     xzr, x2, [sp, #-16]!
+       stp     x3, x2, [sp, #-16]!
        mov     x0, sp
        ret
 
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h 
b/arch/arm/include/asm/proc-armv/ptrace.h
index bebcaf6e33..3b8fe7aac0 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -21,7 +21,7 @@
  * on the stack during an exception.
  */
 struct pt_regs {
-       unsigned long unused;
+       unsigned long spsr;
        unsigned long elr;
        unsigned long esr;
        unsigned long regs[31];
-- 
2.25.1