On Thu, 17 Mar 2022 22:54:17 -0500
Samuel Holland <sam...@sholland.org> wrote:
> This is the only possible mux setting for the A64's PWM peripheral.
>
> Signed-off-by: Samuel Holland <sam...@sholland.org>
Compared against the manual:
Reviewed-by: Andre Przywara <andre.przyw...@arm.com>
Cheers,
Andre
> ---
>
> (no changes since v1)
>
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> index 14d40a016b..dc52de0cf1 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> @@ -571,6 +571,7 @@ static const struct sunxi_pinctrl_function
> sun50i_a64_pinctrl_functions[] = {
> { "mmc0", 2 }, /* PF0-PF5 */
> { "mmc1", 2 }, /* PG0-PG5 */
> { "mmc2", 3 }, /* PC1-PC16 */
> + { "pwm", 2 }, /* PD22 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
